Issue with duplicated Pspice model -Full version of Cadence 16.5

Hi ! We are trying to implement a full bridge inverter with two NCP5181 as showed in the figure. When we copy this half bridge model with the same inputs, eveything works well. When we are trying to invert the two logicals inputs (DSTM1 and DSTM2) on the second half bridge, we have 0V at the output of both circuits. Any thoughts ?

Thank!