Test Point Covered With Solder Mask

i recently processed a third party design, the "min pad size" for test points was set at 0.034", unfortunately there were vias selected as test points that met this rule but the solder mask opening was smaller, <0.034", is there an audit or parameter that will flag a violation if the solder mask opening is smaller than the "min pad size" for vias, pth pins and smd pins