Hello. I am trying to export changes from Design Entry HDL schematic to brd file but I got an error:
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Start Constraint Override Import
Constraint File: C:/Users/shchyuchkin.e/Documents/SOS Workareas/Projects/1310EU015_Angstem_FET/worklib/1310eu015_angstrem_fet/packaged/pstcmdb.dat
Start time: Tue Apr 07 13:56:05 2020
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ERROR: Schematic supports creating XNets using DML Models but the Layout will create XNets only for devices having XNET_PINS properties. Change setting in Layout or Schematic, re-generate files, and re-run the flow.
ERROR: Can't import electrical constraint data (pstcmdb.dat)
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Finished Constraint Update Time: Tue Apr 07 13:56:05 2020
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I am not using XNets and I tried different export settings.
I have read several topics with the same question:
https://community.cadence.com/cadence_technology_forums/f/pcb-design/38866/export-physical-error
But I didn't found XNets settings in constraint manager window. I got such settings:
So I can't continue working with PCB. Help me please to solve this problem. Thank you.