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Allegro grid snap
For some reason Allegro is forgetting that I have grids turned on. When I first open Allegro it works for a little, while then it just decides it no longer wants to follow the grids. I shut it down and...
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Preserve around BGA from other symbol placement
Hi,I am going to use a heat sink with a clips on my BGA and I need to prevent other parts to come closer than a specified distance. I have placed a rectangle on "Package Keepout/Top" so other parts...
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BNC Schematic Symbol (2 pins) to PCB Footprint (5 pins) best practice
Hello Everyone,I have a BNC connector that physically has 5 pins. A typical BNC schematic symbol only has two pins. In the past I've simply made a new schematic symbol with 5 pins, four of which are...
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Netlist error
I've gotten the following error when generating a netlist on a schematic. It goes away if I delete the part in question, but comes back if I add that part back to the schematic. An earlier version of...
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Orcad Capture Market Place
Hello I am trying to download Orcad capture apps from capture market plus , when I use my community account log in it’s not taking As well when I try for new account creation its saying not supported...
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User defined properties
Hi,I have created a user defined property, added it to my allegro.cfg file, and successfully imported it into PCB Editor by referencing this...
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Design Setting
Hello everyone,can anyone give a description about the "design setting" in parameters?I didnt found any application note yet. As i know there are some points in "Design Parameter Editor"What is...
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Plotting option error occured trying took printout
Hi..For my finished my board i try to print the error occurred as "There is not enough memory for this operation". The window is also get exits. I had changed the grid option too,then checked the...
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PCB plot in Print Manager problem
Hello,this is the first time I print a PCB with Print Manager and I Have a strange problem. I select "Post Process Settings" and then in the Layer spreadsheets I select Plot to Print manager in order...
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Integrate PSpice netlist into Capture schematic
Hello, How to integrate PSpice netlist in Captureschematic. I've tried 2 appoaches:using Hierarchical blockusing Library part In both cases I failed: via hierachical block ... the port names exposed in...
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PSMPATH and subdirectories
Is it possible to just specify a directory for footprints and allow the software to search all the subdirectories and not have to list each one ?
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Routed Trace not visible Dynamically
Hi,If i draw a trace, or move an object or do anything in cadence allegro 16.5, nothing happens, but if i zoom in/out, then its already visible what i have done.so during editing, i cant see what i am...
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How to arrange my board design based on the A4 page size
Hello:I wanna arrange ten board designs on A4 page.How to adjust the board design coordinate and put the ten designs on the same page in the pcb editor.
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Concept HDL Settings
I'm looking for a way to preserve my ConceptHDL settings (i.e. grid sizes, page border symbol, custom variables, etc..). During the instantiation of new projects these settings return to default, and...
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Cross probe parts and move them together
I have my parts placed using quick place. I want to be able to select a group of parts in Orcad , have them selected in Allegro and then move those parts that are located randomly to a small group...
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Unplacing more than one component
I can select one component and un place it with the RMB Unplace component. How do you unplace multiple components ? That RMB does not have unplace button.
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Get value of component by SKILL
Dear All,When select a component on drawing then choose menu Display/Element, i can see value of component on Show Element window as below:Properties attached to component definition TOL...
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Orcad Capture Footprint property and Allegro .dra package symbol
In capture when I right clicked the component and under the footprint property can I put down the path to the .dra footprint from allegro?If not? the second way to associate the allegro footprint...
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Routing of DDR2/DDR3 Memory
According to JEDEC DDR2/DDR3 layout guidelines, the routing of signals has to follow certain topologies, but can I disregard those and just put the delay skew between datelines and differential signals...
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WARNING(ORNET-1119): No PSpice Template for...
Hello,I wanted to use libraries from older ver. ORCad (16.2) in new one because I haven't find two elements (BD 139 and BD140). I added older libraries but now appears problem from the title. Is there...
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