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How to perform operation on one object at time on objects found using the...
From HDL command console use find to put objects in a group.How does one perform an operation on each object that was found using the find command one at a time from the command console?
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SIP file to brd file
I have a sip file and would like to convert it to a brd file. Does anyone know how to convert it?
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PCB editor command to select a module instance by name?
In the past, I have automated the placement of components in Allegro PCB Editor by writing little programs that select components by reference designator and move them to program-calculated locations....
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parametric sweep analysis in Orcad capture?
I want to plot cmos Pout-Pin graphs. İn DC sweep analysis, we can use sweep variable just voltage or current. I think I can define Pin variable in parametric sweep analysis. But I can't figure it out...
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Using S parameter in Pspice simulation
I want to find power gain(S21) ,impedance matching (S11) and noise figure using s parameters for cmos LNA.And I want to do simulations in orcad pspice. How can I do that? please helpthanks in advance
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Analog & Power Ground Connections
Hi,in the new board I'm working now, I have to different DC converters, one step-down (buck) and one step-up (boost), also other analog components, moreover some digital components.PCB is a 4-layer one...
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Surface Mount Pad/Package Appearing on Top and Bottom
Hi All,I got a board I designed back from fab and found two of the packages appear on both the top and bottom layer. It definitely didn't get placed on the bottom as well since the footprints are...
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vector based pad behavior
I just noticed in my artwork control form setting , some of the layers have "vector based pad behavior" checked.I've not seen an issue on any boards. Which way should these be set, or does it matter?
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Kitchen Units North East
Kitchen Units North East. Thirty Ex Display Kitchens To Clear. www.exdisplaykitchens1.co.uk £ 595 Each with appliances.Tel 01616-694786
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Recover footprint(.DRA) files from .BRD file
Hello everyone, I'm working on a new design which needs some footprints made for some connectors. The previous engineer used this same connector on some other boards and I am hoping to reuse the...
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How to add Window Panes to paste for a thermal pad
Hi, I'm new to the forum and to Allegro.I'm coming from a Pads environment and slowly trying to learn Allegro.I'm trying to add window panes to the paste definition for a thermal pad on an LLC40...
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Pin Number and Part Number gets mixed up while annotation
HI all,I'am a newbie.I have a problem when i want to annotate the schematics. I have R3 and L11 as a pin number of FPGA.While annotating the schematics this R3 is considered as a resistor and...
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Library padstack report
I've noticed I have made a mistake in the padstack name.I did a save as to new name and deleted the old padstack file. Now how do I know which symbols in my library use this padstack?Is there a report...
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3D step model
I have been creating step models for my boards for a while. Mostly they came out great and all MEs love them.Only one problem, sometime it created solid model and sometime it created hollow model. Not...
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(SPMHUT-48): Scaled Value has beed rounded off.Allegro 16.6.
Hey,I am new on Allegro 16.6.,I have made a connector foot print.When i was designing pads for it.I think that error occur that time once.But i have made a connector now.When i place this part in PCB...
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Concept HDL BOM generates too many non-existent parts
Hi there,After I generated a Concept HDL BOM, I noticed a lot of non-existent discrete parts (R,C) being generated.I am using a flat design, created from scratch, with very few component count.Anyone...
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PCB Editor XML Export
I am looking to be able to take a Mentor tel netlist, do a netin, and then run Design Compare. The goal is to do all of this from the command line outside of PCB Editor.Technically I can do everything...
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Importing DXF with specified core layers into Allegro
I have a .dxf file for a footprint that has a stackup specified by our signal integrity team. The .dxf includes core layers and prepreg.When I import I don't know what Class and Subclass to use for...
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Error while Importing DX Designer tel file to Allegro
Hello, I have designed the schematics in DX Designer. Netlist is generated with 0 Error and it also generate the device file. But what I observed device file device type did not show up in .tel...
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Orcad Capture schematic symbol, footprint and netlist
Hi,I'm new to the Orcad capture and I'm designing a schematic. I understand that first I need to create schematic, assign a footprint to them in order to generate the netlist and then design the pcb in...
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