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Capture 2019 DRC
HiI had run DRC on my design and have got some markers here and there. Now i am trying to remove these markers which I am unable to do. It worked fine on 17.2 release. Settings are:
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Mismatch in components location between pick/place file and OBD file
Hello AllGreetings..I have designed a PCB with the components on both TOP and bottom layer . Generated OBD++ and pick/place file. But the Assembly house is reporting that the ODB++ file generated from...
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Modify Package to package Spacing property
Hello Everyone, I would like to change the property "Package to Package Spacing" from 0 to 0.5 mm. I know it exists (see pic) but i cannot manage to find how to modify it. Please, someone could help me...
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Customizing the Columns in Properties Editor
Hello, I am using Orcad Capture CIS 17.2 I have been trying to make a custom Filter in Properties Editor->Parts tab. I am able to Hide the columns I don't need, and Add Filter for columns I do need....
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Adding A Page Border in Capture CIS Orcad 17.2
So , many of the basic tasks in Orcad Capture CIS have proven to be very frustrating. In this instance, adding a border to my schematic pagesI know that there is a border feature in ORCAD Capture CIS,...
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Length match in DDR3 FLYBY (need som like virtual pin?)
Hello, I'm relative new in Orcad and I'm working on a board with two DDR3 RAM.Address lines have flyby termination, so I've to route traces from CPU ball to first RAM then to second one and at last to...
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What purpose does the Title Block Tab in the Design Template serve.
I am attempting to get title blocks to work in my designs, but they do no behave how the help and tutorials say they should. When I start a new design, and fill in the Title Block tab of the Design...
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Features of Cadence 17.4 Allegro
Hi What are the features of Cadence 17.4 Allegro over than 17.2?
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How to insure component is not placed on top of a through-hole pin?
What's a good method to insure a component (using place boundary extents) is not placed on top of a through-hole pin?Example: connector on top side of board, SMT part under it on bottom side of...
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Trunk routing and breakout both ends
Hi Is the Routing for breakout both ends is possible for Cadence 17.2 Allegro?and how to route trunk route in Cadence 17.2 Allegro using Licence below * Allegro_performance *...
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New element collection for OrCAD 17.2
Hi all,I imported a dxf file and various line element groups were made from the dxf file. As you can see from the image, the yellow arrows represent a complete element group that was created. It is...
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Orcad PDFExport
Hello,I'm using Orcad 17.4 and my PDF export is acting strange - no nets, or components values apear on the output file.I'm using gswin64c converterFor exampe:
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schematic vs netlist vs layout checking(verifying)
I have created a pcb design in orcad 17.2 the schematic is now converted to board using layout now I have to compare and cross check the nets of schematic vs netlist vs layout in orcad there is a...
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Multi component cross-probing HDL->PCB
HI,is it possible to use box / rectangle select in HDL to crossprobe and select multi components in PCB Designer at once?I can ctrl+left click multi components one at a time in HDL and than use move...
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How to indicate off-board connections in LAYOUT
I'm designing a daughter board using OrCad Layout (old, I know). The board has 2 40 pin connectors at opposite ends. Both connectors have VCC net connections to the main board. The main board has the...
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Exposed Pad QFN
HiI am drawing a qfn.dra file. The 32 pads are defined with Pin(Top, SolderMask Top, PasteMask Top).In the datasheet, it is recommended not to solder Exposed Die pad in the center. So my question is...
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Sync .DSN and .BRD
I have an archived capture design (.DSN) that was sent outside for layout. Once completed the layout (.BRD) was also archived. Both were done with an older version of Cadence/Allegro and the .DSN was...
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Concept doesn't remember reference designators when I import a lower level...
Concept HDL 17.2Importing a lower level block loses the reference designators and results in an un-reusable PCB layout. The box for retaining reference designators is selected. Is there an elegant way...
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ERROR - [SPMHOD-29] in Allegro Tool
Hi guys,I have a PCB file, and then I open it by Allegro Tool. But, I see a message like this:This is a first time I met this, I don't know anything about this error, so hope everybody help me! Thanks...
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OrCAD Capture V17.2 - BOM configuration management
Hello,I have to manage two board with the same schematic but different BOM.The two DSN have the same property "NM" for non mounted component, only this column is different on the two designs.The board...
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