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Orcad capture quits unexpectedly
I am using ORCAD capture v16.3. I attempted to edit a part from a schematic by selecting that part and choosing 'edit part' option in the menu. I edited that part and saved it. When I click on 'update...
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How to display different Drill Legends on one sheet.
I have been trying to find how to display different layer drill legends on a single sheet. The help file 'algroman.pdf' shows the type for file I am trying todisplay in Figure 2-1, but when I am in...
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How to incorporate female and male plugs and solder points
Hello everybody,I am a student making a project on PCBs ,and i have a small question .The schematic i want to map ,has many Plugs (both male ,and femlae),and solder points,and connectors (like the...
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How to set global constraints
Hi,When I open the constraint manager and try to set the global constraint it barks at me and says "Shape (THRUPIN_TO_SHAPE_SPACING) cannot be set directly on Designs". Why?A work around is setting all...
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New 16.5 user
Hi all, I am new to PCB Editor 16.5 coming from Orcad Layout 15.7. I have been using Orcad products to do pcb layouts since it first came out back in the 80's. I would consider myself an expert user...
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Require help of experts
Hi everyone I just launched the website http://www.tutorialfrenzy.com/cadence-orcad-mux.php. It contains different articles for users who have just started to learn Orcad. I would greatly appreciate a...
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Global padstack change?
Let's say I'm making a 16 pin part. I selected my padstack and inserted all 16 pins. I now decide that I want pin 1 to be different from the rest. I like the current padstack and want to keep it for...
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Need a shorted piepad. Define a "draw short" layer?
Would like to add an etch layer at the footprint level that adds two layers(side A and B) for shorting etch. Like the idea of a separate gerber layer that draws the short after fabricators verify a...
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Exact Etch length
Hi Guys, i need to make a cline an exact length for RF purposes how can i do this while routing manually.im using Allegro PCB designer 16.5. i have tried setting the Min Total etch length to 31.339mm...
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Shape to line distance issue
Hi Guysim running into an issue designing my board. i have a dut (LFCSP Footprint) the center paddle is connected to ground along with some pins pointed to by the arrow in the attached image. the issue...
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How to change signal globewise in concept hdl?
I was using VCC3V3 in some page and some page I was using VCC3V3_FPGA so I want to change all signal to VCC3V3_FPGA in one shot in Allegro Design Entry HDL. Regards,Giri
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Setup materials with materials.dat
Hi, I want to create some own materials so that they are available for selection @ "Material" column of "xsection".i modified the default materials.dat (Just copied a few lines of an existing material...
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How do I supress my keep out areas in the 3D View? (Version 16.5)
I am trying to export my design to an IDF file format, but I can't suppress the keepout areas in the 3D view. When I try to set the "Default symbol height" in the Design Parameter Editor to 0, it...
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New design defaults in Allegro 16.6
Hi, I have a board called new_default.brd in the location specified by mywizard_template_path variable but when I start a new drawing without selectinga specific template I do not get the new_default...
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Removing 0 width warning during artwork generation
I always used to use 0 width text for footprint silkscreen, and then when they used in project I just select specific width for all undefined width lines. But since I upgraded Allegro 16.6 to S015...
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IPC: side orientation of parts, netlist IPC-D-356
I have two questions on IPC issues.First: According to IPC where do i have to place the side orientation of parts. BOM? placement file? assembly drawing? or silk screen? and which document specifies...
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How to add a company logo or a marking seregraphy with "Allegro PCB Design"
Hi,how to add a company logo, a picture, or a marking seregraphy in PCB board with "Allegro PCB Design",see exemple in attached image: Best regards, Haithem.
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Problems with no pspice template
Hi, I am trying to build a half wave rectifier however when i try to proceed with the simulation i am getting several errors and not quite sure how to resolve them. The error i am getting is in regard...
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Allegro "Layer Priority"
Is there some trick to getting "layer priority" to work everytime? It works on one design but then it doesn't work on the next. It's pretty straightforward; add the layer that you want displayed on top...
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ground polygon in between parallel bus lines
Hello,I just finished a design of parallel a RGB bus to pump image data into a TFT display. The bus frequency is 25MHz. To prevent crosstalk between the lines i placed ground polygons in between each...
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