Hi ,
I am getting following error message , while clicking nsware|PCB FLow|Post processing menu option
"Command not found: ns_postproc".
Also getting "Command not found: ns_gerber".
I will appreciate somebody can give me some hint on the above error messages.
Regards
Praseed Kumar
Hi community,
I designed a DC/DC boost converter with a RLD snubber. I ran a parametric sweep to study how the snubber inductor influences the reverse recovery current of the main diode. I chose different inductance values but at the end of the simulation, I noticed a weird behaviour highligthed in the picture below. In particular the tool shows other values of inductance of a previous simulation, even if I run again the simulation deleting these values, PSpice still continues to show them without evaluating their waveform. Maybe I was mistaken with the settings of the simulation, I am not sure. Could someone help me to undestand how to fix this issue?
Thank you in advance,
Gerry
The figure below shows the issue I talked before.
I have a pcb file that I swapped a number of functions(gates).
When I run File/Export logic/netlist Other on the pcb file that I swapped gates against the original pcb file I get errors in the log file as shown below. Any ideas what the error means or how to fix it ?
I even saved the updated pcb file and loaded the original netlist and get these errors.
Warning TF-13266 not matched in START database!
Warning TF-13265 not matched in START database!
ETC.
Thanks
Hi!
I was working on a package symbol of BMI160 and after the footprint was finished, I wanted to save the file and get the *.PSM file. Not only haven't I gotten the *.PSM file but also I have gotten this message:
"BMI160(file name).log does not exist."
and I have got this message in commands terminal:
"Error(s) occurred, check logfile."
can anyone help me with this?
with all regards.
Hi,
I am using 16.xx version and when i draw any shape it is getting merged with pads of other nets.
I have set shape to through hole constraint parameter of 30 mils. It is a multi layer design and it is occurring only on the top layer.
What might be the exact issue here ?
Thanks In Advance
Hi evryone,
I would like to add a new automatic property in the title block. I use capture CIS. In the title block there is a property "Core Design". This property changes when I choose the type of variant.
I would like to add another identical property. Is it possible? How can I do it?
Thanks
Hi there,
I cannot figure out why "link database part - update symbol" action will change my part property display location. As you can see in the below picture, although the "source package" is the same, I check the box to force a schematic symbol replace, because I want to reset the property location, like "value", "TOL" to library default... (I cannot do this by using replace cache, because this will clear all my part property linked by CIS to the default state from .OLB library)
You can see after the above action, the part reference, value and voltage's display location are all changed... their location is not based on part library's location, but very similar to the "rotate" action, which orcad will determine the location itself.
What can I do to make orcad reset the property display location to library default?
Thank you.
HI
I'm using Cadence 17.2 in this I'm unable to change units from mils to anyother (lik mm, inches) and also the decimal point is not changing from 1 to any other number. Please let me know what might the problem.
Hi,
I have an issue. The library I inherited has both DFA Placement Boundry (e.g. old days PADS courtyards approach), and the typical PLACE BOUNDRY/TOP or BOTTOM. The PLACE BOUNDRY is based on MAX true component size. I have my constraints set for PART/PART clearance (e.g. say 10mils between components, irregardless of the pads. All my constraints are based on how close assembly will allow parts. It seems that the DFA Constraints utilize the DFA Placement Boundy, not the PLACE BOUND top/bottom. Is there a way, aside from deleting the DFA Place Boundries, to get the DRC to only use the PLACE BOUNDRY?
Is their any option in ET simulation of power dc where in which we can plot temperature vs time which illustrates at/by what time the temperature increases or decreases.
Is it possible with Speed2k to do multiboard EMI/EMC simulation considering the emi noise/effect of one board over the other board. there are 10 boards in the cabinet and i want to do emi/emc for the same.
Any other products from Cadence(or others) which can do this for me
Hi Team,
i need to convert the .dpf file (partition file) into allegro board file.
I am looking someone to help for this post.
Hi all,
I have a PCB schematic in Orcad Capture and upon clicking on Create Netlist to get the PCB design, the box gets stuck on 'updating Allegro PCB editor Board' and Orcad crashes. Any suggestions on why this is happening? It doesn't use to happen before but for this particular design, I have moved my libraries and drawing files to a different folder. I can't remember where in Capture I can specify these folders.
Many Thanks
Hi,
I'm trying to annotate & netlist a project that references other projects. I'm running OrCAD 16.6.
When creating a H-Block, the Place H-Block form is filled out like this example:
I have multiple H-Blocks in the top level each calling out a separate project. This is what the real project looks like:
It works. Subproject1.opj can be edited, annotated and netlisted as a separate project. I can descend from the top level into any of the hierarchical projects. I can synchronise Hierarchical ports between top level and the referenced opj.
However, there appear to be two issues:
1/ Annotating at the top level does not annotate the referenced projects. I can live with this.
2/ Netlist at the top level fails. This is what I need help with please.
Netlister says:
INFO(ORCAP-32002): Netlisting the design
INFO(ORCAP-32004): Design Name:
W:\HARDWARE\CADENCE\000 12G EXPANSION CONTROLLER 5000206A\5000206A.DSN
Netlist Directory:
W:\Hardware\Cadence\000 12G Expansion Controller 5000206A
Configuration File:
W:\Hardware\Cadence\SPB16_6\tools\capture\allegro.cfg
Spawning... "C:\Program Files\Cadence\SPB_16_6\tools\capture\pstswp.exe" -pst -d "W:\HARDWARE\CADENCE\000 12G EXPANSION CONTROLLER 5000206A\5000206A.DSN" -n "W:\Hardware\Cadence\000 12G Expansion Controller 5000206A" -c "W:\Hardware\Cadence\SPB16_6\tools\capture\allegro.cfg" -v 3 -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
#1 ERROR(ORCAP-36023): Unable to find package for JBOD1: TOP, P01 TOP LEVEL (157.48, 96.52).
#2 ERROR(ORCAP-36023): Unable to find package for BPCONNECTOR1: TOP, P01 TOP LEVEL (73.66, 5.08).
#3 ERROR(ORCAP-36023): Unable to find package for CTRL_PWR_JBOD1: TOP, P01 TOP LEVEL (350.52, 5.08).
#4 ERROR(ORCAP-36023): Unable to find package for RAID_CONTROLLER1: TOP, P01 TOP LEVEL (157.48, 187.96).
#5 ERROR(ORCAP-36018): Aborting Netlisting... Please correct the above errors and retry.
Exiting... "C:\Program Files\Cadence\SPB_16_6\tools\capture\pstswp.exe" -pst -d "W:\HARDWARE\CADENCE\000 12G EXPANSION CONTROLLER 5000206A\5000206A.DSN" -n "W:\Hardware\Cadence\000 12G Expansion Controller 5000206A" -c "W:\Hardware\Cadence\SPB16_6\tools\capture\allegro.cfg" -v 3 -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
INFO(ORCAP-32005): *** Done ***
Error ORCAP-36023 isn't listed in the user manuals. What package is the netlister looking for? How do I fix this netlisting error?
Thanks,
hello
is there any way to move an object to a different layer in one action?
i am currently using Z-copy to copy an object to a different layer and deleting the original object.
i would like to do this in one action (move) instead of two actions (copy and delete).
I have a design in which I connected a series of relays, creating a hierarchical block that has a single input and 4 outputs. Then, I linked these blocks together to make a relay system that goes from 1-->256 outputs. The problem is, I'm not connecting to 256 outputs all the time; having this many outputs is a consequence of duplicating modules in powers of 2 (because each relay splits the signal), but it's not necessarily what I need. This results in a lot of pins that are simply "No Connect." However, when going to PCB layout, these no-connect relays still take up space and are part of the netlist, even though they're not needed. What I need to do is maintain the basic 1_4 relay block, but in specific occurrences of this block, edit the design.
If I edit the design, it edits ALL of the blocks. Is there any way to instantiate a block so that I can edit its internals, independent of the other blocks that exist? Using Orcad Capture.
hello
is there any way i can create a shurtcut key for turning on "All on" and "All off" on the Find Filter?
also i would like to be able to select "vias" only on the Find Filter by typing one shortcut key.
Any one else having trouble with place via array (boundry) since the latest 17.2 hotfix57?
I'm trying to place an array just inside the outline of a 2" circular board.
Appears that allegro is not seeing the "non-circular object settings" ( I want the array to be a specific distance inside the outline and a specific spacing).
No matter what I do, even with "non-circular" selected, it adheres to the circular setting (specific radius and specific angle).
Thanks,
Phil
Hi
How do I go about changing the colour of multiple selected items such as "Net Aliases", Notes, RefDez etc in Capture ?. I can only change the colour one entity at a time.
Basically what I was expecting is to Ctrl click each object then right click properties and change the colour. That does not seem to be an option ?
I am running the current version.
Thanks..
Using 16.6
Hotfix 115
There is a type I just noticed in the IPC file in the Comment area:
Output is misspelled:
C IPC-D-356 Ouptut File from Allegro
Should be:
C IPC-D-356 Output File from Allegro
I had a over seas vendor ask about this