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Wirebond and Flip Chip design in SiP to ODB++ output

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Does anyone know the work around on creating the odb++ file with the stacked dies on hybrid designs???

I am exporting out ODB++ file with wirebond die on WB layer where as FC is on Metal 1 layer and the output is not reflecting the correct data.

Any ideas??? suggestions how to handle the data to create the odb++ with all the intended layers with respect to data type is highly appreciated.

Thx


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