Would like to leverage design reuse primarily for placement and top/bottom layer routing and duplicating one type of circuit (including .mdd) multiple times. I understand that gen_subdesign and use_subdesign along with applying subdesign_suffix at the schematic level will be needed for multiple placements. The problem is that in house tools cannot handle reference designators with _ in them. Any chance that I might be able to renumber the ref des after placement to remove the _ and then back annotate to the blocks ? If so what would I need to do with the packager and/or block properties moving forward to preserve these renumbered ref des?