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DRC not flagging line to hole clearance violation

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Hello Cadence Community,

I have a weird problem.  I have a board with two mechanical symbols, each with an unplated mechanical pin padstack.  If I route a line through one hole, I get a DRC error while if I route the line through the other hole, I do not get a DRC error.  This is very strange.  I cannot find out what the difference is between these two holes.  Perhaps someone can look at my board to see what the problem is.  Many thanks in advance.

I am using OrCAD PCB Designer, 16.6.

Cheers,

Allan

p.s.  How the heck do you attach a file?  I'd like to post a zip file of the project.  I will try posting "media" so here goes!

(Please visit the site to view this file)


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