Using 17.2 SO35. Routing a board that has a CPU, CPLD and SD ram. Did an earlier board at an earlier revision (17.2 not sure what version) that had the same combo with Address and Data lines going to a T and then split off to the Ram and CPLD. This was done by removing one segment of the trace and then measuring from the Via to get the overall length of that segment (CPU to CPLD).
Then removed a segment of that trace and put the other one back. Then was able to tune the length of the last segment (CPU to SD Ram) to match the length of the first measured segment (CPU to CPLD). In the latest version even if I remove one segment of the trace when I measure from the via it high-lights the whole net and gives me the length of the entire net including the section that is disconnected. I know other people are doing this same thing with a CPU, Ram and a CPLD.
What method are you using to do this?