Hi Folks,
I'm new in here and an ME with a long career in electronic packaging. So I've worked with lots of EEs and ECAD Designers in my career. But one thing I've found that hasn't seemed to change is that circuit heat dissipation estimates from the CCA design EE continue to be ultra-conservative. Too conservative for that matter! I've seen total CCA power estimates 2-3 times higher than measured in the final product in the lab (operating under worst-case duty cycles). But at this point in most design cycles it's too late to spin the design again to remove the thermal management hardware I added but rendered unnecessary by the lab measurements.
My question is this: does Sigrity PowerDC do this? If so, how and with what assumptions and conditions? Is there a whitepaper behind it?
if not, is there ANY software that will do a statistically sound power dissipation estimate on a circuit well before the end of the design process?
TIA!
Bruce