Shape to Thu Via Spacing
I observe the following error message:DRC error "Shape to Thu Via Spacing" Layer 2Constraint value 0.127mm Actual value: 0mmIs this a problem with the via or the shape? Suggestions how to fix in...
View ArticleVoid in Place Bound Layer
I'm trying to create a void in the Place Bound layer so that I can create a 3D representation of a hole through a mounting plate, but Allegro is telling me I can't add voids in that layer. Does anyone...
View Articleconstraints: MIN_METAL_SPACING and MECH_PIN_TO_CONDUCTOR_SPACING
I'm having trouble locating these constraints. I want to change the hole to everything spacing to 30 mil. I did it in constraint manager but when I update the dynamic planes the spacing is still 8 mil....
View ArticleOperation of Allegro without a current licence
Hi All,Are Cadence Allegro licenses only valid for a year or is there some for of license that would continue beyond the license period without updates or support?I was wondering if it was possible to...
View ArticleCIS+MariaDB+recent hotfixes=problem (and solution!)
I run Capture CIS on Win7, querying a MariaDB (MySQL clone) on linux. Recently, I upgraded the ODBC used to query the database to the most recent version (3.0 MariaDB connector), to upgrade the SSL...
View ArticleCadence Sigrity PowerDC: Does it provide circuit heat dissipation estimates?
Hi Folks,I'm new in here and an ME with a long career in electronic packaging. So I've worked with lots of EEs and ECAD Designers in my career. But one thing I've found that hasn't seemed to change...
View ArticleError trying to link the CIS Part manager with a database Microsoft access...
Hi I have an error trying to import my company's Access table to OrCAD CIS: Error is (ORCIS-6238) Part # property type not configured correctly in table capacitors. I am very confused by this error,...
View ArticleCross Section editor in 17.2 'locked'
Hey guys...any help would be appreciated. I am sure like with most things, the answer is super simple and staring me right in the face, but I certainly can't see it this morning. I am working on a...
View ArticleDisplay net alias on placing cursor over net
I m using ORCAD capture CIS v17.2 . I am not able to view the net alias by placing the cursor over it. When I select the net, the net name is displayed below. I was able to this in my previous...
View ArticleCapture-Allegro filter
Hi, I'm drawing a schematic. I would like to add some property/constraint about some nets, for example, minimal/max width tracks or spacing.I have read on cadence Help that in Property editor window i...
View ArticleImporting PADS footprint into Allegro 17.2
I am using Allegro 17.2 and I need to import some PADS footprints.The footprints are given as four files, *.ld9, *.ln9, *.pd9, and *.pt9, how do I get Allegro to translate those files into a *.dra...
View ArticleAllegro Context Menu Disabled(grayed out) after update to QIR5
In Allegro PCB Designer, when I right click on canvas, all entries in context menu are show gray. They are all accessible and enabled but the text color are light gray and displayed as they are...
View ArticlePlacing large amount of parts
Dear engineersI have trouble with mass placing more than 10,000 parts since this operation takes too much memory.(File size is 1.06 GB)Even though I could placing them all, because of huge amount of...
View Articlevia connection quandary
I made a four layer board. I also made a shape in layer 2 that I defined as ground (0V) I need to perforate the “ground” plane with vias to connect layer 1 to layers 3 and 4 without making contact with...
View ArticleImport DXF in Orcad Capture CiS
Hi all, I didn't find posts about this argument. I have to drawing some library about mechanical parts in capture Cis. I have files DXF about mechanical part. Is possible to import file DXF while i'm...
View ArticleJumper & Single Side PCB's
Dear AllI m an newbie to Orcad PCB Designing Suite & Application, I hope I m not repeating the stuff again, Earlier I worked on PCB's and PCB Designing through Ares, Due to user friendly nature it...
View ArticleMove ports in symbol created for module
This is something that has bugged me for a while and I have not yet found a solution:we often re-use schematics in the form of modules. Typically, we create the module following a procedure similar to...
View ArticleCan't generate netlist in orcad capture CIS
Hi everyoneI'm looking for a format/standard/help document that how to form a netlist fie can be imported to orcad pcb editor for a developing programI wanted to get a sample from my circuit, but when...
View ArticleCOMPONENT FLEXIBILTY IN PART EDITOR OF ORCAD CAPTURE
HIII Guys...I hv a small query regarding orcad capture symbol editor..As i create any SYMBOL the pins are not moving smoothly though i uncheck the SNAP TO GRID option in the settings..I disbale the...
View ArticlePADS Translator of PCB and Library loose all the swappability info
I have done some test and seems that Pad Translator loose any swappability info of the components.It generate always 1 gate containing all the pins.Also all the pins are NOT swappable.the sama appens...
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