In allegro_design_entry_HDL as libraries i am getting and that i have created using Padstack editor is of format .jrl, .psm, .tag, .log, .dra, .psm, .dra.lck. But in Allegro_design_entry_HDL the libraries are divided in three folders. Chips , entity, sym_1
Inside chip it is .prt and .tag
Inside entity it is .tag, .db, .v, .vhd, .vlog004u.sir
inside Sym_1 it is .tag, .css, .lck
So i am not getting how the library for allegro_design_entry_HDL is created.?Please help me out?