Schematic NETLIST is generated without any error. I can Import into PCB Editor from Import > Logic with no error. On my Schematic I have a GND Net and a VCC Net as well as many other Nets. The Cross Section is comprised of TOP, GND, VCC, BOTTOM ( 4 layers ). GND layer has been assigned to the GND Net and VCC layer to VCC Net, using the creation of rectangular Shape creation, as directed in the Allegro PCB Editor Training Manual. Placing is complete and no DRC error shows up. I am ready to AutoRoute the board.
Everything goes quite well and the Board is now routed, still no DRC errors shows up.
Yet, I clearly see GND segments on the TOP and BOTTOM layers as well as VCC segments on the TOP and BOTTOM layers. It’s as if the AutoRouter did not observe the VCC Net to VCC plane assignment nor GND Net to GND plane assignment. Net Assignments to Plane where performed without error and Shape colors appeared on the screen after completion, so I have no reason to suspect the assignment went wrong.If I transfer a TOP net segment to BOTTOM where a GND segment is crossing, I get a DRC error clearly showing that both segments are in contact. Which clearly indicate that this GND segment is located on the BOTTOM layer.
What Im I doing wrong ? What can be the source of this problem ?