Problem with viewing output of Pspice Simulation of Mixed Signal Design
Hi,I am trying to simulate a mixed signal circuit. I can measure the output of analog components, but cannot measure output for digital components. I have inserted a sample below. Vo_sch1 is the output...
View ArticleI require a user manual, quick start guide, tutorial for Cadence Allegro...
Does Cadence Allegro Design Entry HDL have a user manual in PDF format? Where can I get its user manual, quick start guide or tutorial as created by Cadence itself?When I use help I get a message that...
View ArticleCan a cutout be added to a footprint?
I'm new to PCB editor and I need to make a footprint for an RF connector that sits into a cutout on the edge of the board (and is edge plated around the cutout, ideally). I have to place more than a...
View ArticleCouldn't open the capture symbol .Olb file
I have a capture symbol .olb file,there are many part symbols in it, but couldn't open the .Olb file now ,the file size is normal,but when open it ,there is only one line showing unreadable code...,thanks
View Articlepspice model issue
Hi,I've a circuit to perform temperature analysis on which contains an NXP transistor PBHV9040T.I downloaded the spice model from the NXP site...
View ArticleDesignEntry CIS - Visibility Frame Fixed Sequence
Hello,when i open the CIS Explorer in Design Entry, the order in the local part database is different to the visibility frame.Is it possible to classify the list in the visibility frame? For example in...
View Articlecreating netlist orcad 16.6 using windows 7 pro
I have had orcad 16.6 for about a year and have ran across a strange behavior. I click on the netlist icon and it asks for the file name, I enter the .mnl file name click OK it then says it is going...
View ArticleOpening a ADW board file, but not in ADW?
Has anyone seen any issues in ADW if you open a board file right from Allegro, not using ADW?Then saving the board file into the physical directory.Thanks,Jerry
View Articlestrange behavior creating a netlist orcad 16.6 windows 7
I have had orcad 16.6 for about a year and have ran across a strange behavior. I click on the netlist icon and it asks for the file name, I enter the .mnl file name click OK it then says it is going...
View Article"Standard" via definition
If I set via "standard" definition or padstack like this Drill hole circle 0.300mm / Regular pad circle 0.700mm / Thermal Relief, AntiPad are all NULL.Soldermask TOP and BOTTOM are also NULL. Symbol...
View Articlecmos Distortion analysis in pspice
I want to analyse cmos non-linear characteristic and get gm2-Vgs and gm3-Vgs graphics in pspice. How can I do that?
View ArticleError in Netlist: Multiple pin ...
Hi,I am trying to use Bus pin capability for creating schematic symbols in OrCAD 16.6 like below picture:and connected bus from FPGA to it in schematic like below:However, it fails during netlist...
View ArticleNew to OrCAD. I need suggestion and pointer on what to start with.
I just started to learn this software. I looked up some tutorials online. But I still confuse on the software. I downloaded the Lite version on Cadence. So I guess I have limitation on some of the...
View ArticleAllegro's copy function, greyed out options (x/y Qty)
Hello all!I am unable to adjust the X/Y Qty for the Copy function.I'm sure you can see why I don't want to place 1500 units when I only need a few.Any help is appreciated.Thanks, James Oldiges Esq.
View ArticleCreating a board outline made of multiple line segments
Hello everyone,I'm pretty new to OrCAD and PCB design so this is probably pretty simple. I have a board outline that is made of multiple line segments and curves. I want to use the 'Z-Copy Shape'...
View ArticleWow, OrCAD is horribly written software
I just upgraded from 9.20 to 16.6 and the same bugs are still here 15 years later and a bunch of new ones have been added. Who wrote this steaming pile of ****?1. Cursor constantly flickers between...
View ArticleMove and offset updated symbol (component)
I had an old revision of the board, and I replace some Ethernet connectors with new ones.Those are fixed, because they have fixed places on the panel I have, and I don't want to loose their position...
View Articlesmallest text
I am using default text block sizes for reference designator silkscreen.In your experience, can all board houses all print text block 1, which is 16x25?
View ArticleAfter placing a mechanical symbol I can't click or place more symbols
Hello again,I'm running into a weird problem. I made a board outline, mounting holes, ect and saved it as a mechanical symbol. I then go to place this symbol in my design which goes fine, but...
View ArticleVias
6 layer board,default layers - Top, Inner2, Inner3-v, Inner4, Inner5-h, Bottom (Inner2 and Inner4 was Planes(Shields), but change them to Conductor type, i.e. routing should be possible on them.Have 3...
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