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When the net schedule is set in the PCB editor and auto-routing is executed,...
Hi i am Vos.When the net schedule is set in the PCB editor and auto-routing is executed, the routing is different from the set schedule.Is there a solution to this problem?thanks.
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Cant create netlist in capture cis
The create netlist window doesnt have "Create or update pcb editor board" option. The process stops there and I have no clue how to open my schematic in pcb editor. I am using 17.4 version.
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PCB Editor Tool for Matched Lengths in DDR Fly-By Topology?
I'm currently working on a project involving routing of DDR4 memory in a fly-by topology. For a fly-by topology, routing needs to be length matched from the controller to the first device in the...
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Data sync stucks and does not process or gives any error
After I run data sync, it stucks. I waited for hours but it does not process or ends. What could be wrong with it? I am using orcad 17.4 version
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WARNING(ORNET-1119): The part/device cannot be simulated. No PSpiceTemplate...
I made a simple design following an instructor course. Here I placed a connector from C:\Cadence\SPB_17.4\tools\capture\library. When I run Launch design sync I get these warnings as mentioned in the...
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Scalpel skill file
At my last employer I had a scalpel skill tool that was very handy. Can anyone share this or point me to it?It allowed you to draw a path across traces and cut them in that location.
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Show preview of footprint and schematic symbol in external database...
Hi,We are developing a custom component database and a CRUD app to manage the database. We are using multiple CAD-systems and the database is used for all the CAD-systems.It would be great if it was...
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Propagation Delay Delta tolerance value in mils
Hello I usually set relative propagation delay delta tolerance value in mils like “0:100mils” . One of the board I received for modification having it set in “ns” and the max length difference is...
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Internal unused via pad suppression not working
I am using 17.2 SO63, when outputting artwork I have unused pad suppression checked, plot mode positive.My artwork is still putting unused pads on internal layers.When looking at the pad stack in the...
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Net alias name not aligned Schematic PDF.
Hello,When i generated pdf for my schematic, i observed net alias names were not in aligned with net (you can see image below) . Is any one know, what i am missing in setting up ? Thanks you in advance.
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Could this function "Online DRC" be set as default disable in Capture?
Could this function "Online DRC" be set as default disable in Capture 17.4?This will affect the system response.Thanks.
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assign funckey to right click menu items
Hello there,I am trying to assign a function key in myenv to a right click menu item "edit boundary" when i am editing shapes. The code I did tried wasfunckey e "prepopup;pop dyn_option_select '@:@Edit...
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After Capture annotate, in Allegro component locations are interchanged after...
In Orcad 17.2, I am using a hierarchal design. In Allegro, I already placed all my connectors. When importing the netlist into allegro, I got a renaming problem. In Capture, I took off connector J1000...
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ORCIS-6085 error.
Dear Orcad Expert, I have been an Orcad user for quite a while, but never create or set up a CIS environment. after I set up the CIS step by step, it almost works but the last step, place the Database...
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Cant use cadence PCB's auto-router option
Hello everyone. I'm new in cadence products. I wonder if there is a way to solve the following mistake. When I had all the electronic devices placed on the PCB, and I want to route all the tracks but...
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compare and merge .olb
Hi, Orcad Expert, Our team has a few Eagle design transferred to Orcad independently. Each design will have a .olb library associated with it. these libraries are overlapped for most of the parts....
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show measure command
helloi am using the show measure command consecutively but the persistent snap on segment vertex or any other objects does not work.the persistent snap does not work on the second time.Is it only me or...
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Antenna report not finding stubs
Have the version 17.2 S069 for layout using Windows 10. Want to find out if this is a bug or just something we are missing. Have a board with connectors and on one pin the pour going to the pin is a...
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Thru Pin to Shape Spacing DRC
Hello Everyone,I am using Orcad PCB Designer Standard (version 17.2-2016 S065 [3/16/2020] Windows SPB 64-bit Edition) to design my second board and run into this Thru Pin to Shape DRC. Any help would...
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Netlist generation error
Hello everyone.I created a schematic in Capture and transferred it to the PCB Editor. In the meantime, I've added some elements and when I try to update the netlist I receive a bunch of such...
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