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Error in script generated by Ultra Librarian
Hi all,First off, I have never writtens script of my own but I just recently discovered Ultra Librarian (http://www.accelerated-designs.com/ultra-librarian/) via a post on this forum. The script it...
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is it possible to highlight the dummy pins ??
Hi everyone,is it possible to high light the dummy pins for perticular components ??is it possible to explain the Topology ?? (Daisy chain ,T-point ,star topolpogy ) where it will be use ??
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Regarding fanout for smd packages.
hi..i am new to allegro and pcb design...i learnt that if we add via to a trace then it will cause impedance...but actually fanout is a VIA structure ..we fanout BGA and SMD pins...my question is...
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Best way to create negative text on copper planes(shapes)?
All,I would like to know if there is a "best way" to create negative text on a copper plane (dynamic shape). I sometimes see this on circuit boards, but have yet to find such a feature in PCB Editor...
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How to create pcb footprint for C0402 in Allegro 15.5.1
hi all, I am new to this PCB design Field, I am using Aleegro 15.5.1. I want to know how to create a PCB footprint for a capacitor package 0402 and also guide on some basic PCB foot print creation...
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Cannot find "Out of date shape"
Hi @all!I got the message "Out of date shape", but i'm not able to find it. I know i can click on the colored box in the status window and i will get the coordinates. It says, Bottom, Etch, N20936827,...
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problems opening STEP file in solidworks
I am trying to open a PCB STEP file in Solidworks 2012 SP05. I am running SPB 16.6 so15 latest hotfix.When I export from allegro in AP-203, Solidworks tells me "The file being read in is not a AP203 or...
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Step models for PCB footprints
HelloWe are considering adding 3D step models to our PCB footprints.Where does one find these 3D models in order to do this?I found a place on the web that has 3D models for download but they have a...
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Refreshing library padstacks
Good afternoon all, I recently had to change my solder mask layers from 5mils larger than the pad to 6mils for the board house. All the pads are updated and I can open each library part and refresh...
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CIS BOM problem
Anyone know why I would be getting a Part Reference for a Mechanical Part in the CIS BOM? I could deal with it if it were the Part References the Mechanical Part was associated with, but it is not.
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How to delete unused nclegend subclasses
Happy NewYear Everyone,I have a design that was started from a 12 layer design and now it is a 8 layer design. I would like to remove the unused nclegend subclasses. It is an ELIC design so Every...
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Altium 14.0 to Orcad PCB Editor release 16.3
Hi all,I'm looking for a method of translating a .PCBDOC from a recent version of Altium into a .BRD file that I can open in Orcad PCB editor standard edition.I have tried the Altium export of a ".BRD"...
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Simulation Profile Setup Issues
Hey I'm pretty new to PSPICE and I've followed every tutorial there is and they all pretty much say you can choose the "none" option to avoid the inherit from issue when there are no .sim files to...
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Allegro Design Entry HDL (Console and Hierarchy Vanished)
Greetings,I'm working with a schematic that is giving me troubles in Allegro Design Entry HDL (SPB 16.6). For some reason my Console Window and Hierarchy Viewer have disappeared. I've gone through...
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OrCAD 16.5 Extracting Gerber files.
Hello all, I've made a double layer pcb and I now have to get the gerber files so they can be send away.The things i've seen about gerber files are a bit confusing to me.Can some one give me some clear...
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VRM four lumped elements model for PDN simulation
Hello,I am using DC/DC Module TPS62590 in my design. When I set the PDN analysis in Allegro, it requires slew indcance (Lsew), Flat Resistance (Rflat), Output inductance (Lout), Output Resistance...
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Creating a module
Hi,I have 2 boards that I want to combine into a single board using modules. The boards do have very similarly named nets and symbols. After reading through some of the documentation I try the...
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Testprep
Happy 2014!I have a question in generating automatic testprep. I have FPGAs 1mm pitch, and 1mm probe spacing is Only allowed under those FPGA. Is there a way to set like a CM area on testprep?...
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Orcad capture cis slow starting in windows7
I have a problem with Orcad CIS loading on windows7. When I try to start the program it takes several minutes (approx 10 minutes) before I even see the splash screen for Capture. After it loads...
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EXPEDITION SCH TO CONCEPT HDL SCH
Hi All, If possible to convert expedition sch into cadence concept hdl sch?Regards, Karthik.
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