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enhanced part development for DEHDL
Hello, how can we handle a part with different pack_types (jedec_types) and different symbols (for DEHDL)?Symbols (Symbol versions: sym_1, sym_2, sym_3) have different pin counts and if we choose over...
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OrCAD Flow Tutorial - Full Adder (Hierarchical Block Cross Reference Error)
Hi everyone, I was going through the OrCAD Capture Tutorial designing the full adder circuit using 2 half adder hierarchical blocks. My problem is when I try to cross reference the full adder design I...
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Problem with rectifier, field voltage won't go below zero
Hi, I'm writing a bachlor degree about rectifier circuits. To simulate my rectifier bridge i'm using Orcad capture CIS (picture 1). My problem is that i can't get proper graphs for firing angels above...
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Route more than one layer for the same net
I use ORCAD V16.6 and PCB Designer. I'm trying to route more than one layer to the same net. For example the TOP and BOTTOM of the net layer name: N5978729.
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Capture CIS ORCIS-6182 I am not sure what this means
When I do update part status I get the following message: ERROR(ORCIS-6182): Cannot find approved part number ECJ-1VB1H122K Linked To Schematic Part C129. I have checked the part and all the data has...
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Strange questions when generationg Artwork using Allegro 16.6
Hi all, First, thanks so much for your time spending on my post. I met a pretty strange question when I generate artwork using allegro 16.6. Since I am new to allegro, I will describe my question with...
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Stilhaus Kit-chens Review
This Forum is probably the best forum that i have ever used and i would just like to say how proud i am to be a member of this forum
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Decrease cutouts PCB
How to decreasecutoutsPCB (BOTTOM layer) ? PCB Editor project linked: http://speedy.sh/HAkGA/LASTLAB2PROJECT2504ver11ver36.brd
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WARNING(SPMHDB-46)
Hi all,Im getting this kind of error when running database check. ERROR IN PAD STACK name = DUMMY WARNING(SPMHDB-46): Illegal null pad.i cannot output gerber data because of this error.Any ideas?Thanks.
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How do I prevent a DRC Net shorting error in PCB design?
Good Morning,I have a devide that has 4 pins going to the same net, but 1 of those pins is a sense line that goes to another pin on an edge connector... All of the pins are connected together in the...
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dvi models
Hai , I need to simulate a dvi transmitter does any one has the model for a DVI transmitter if any one have the model (any) please help me regards agxin mj
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PIN SWAP OPTION IN CONCEPT HDL
Hi ,How can enable the pin swap option in concept hdl?Thanks,Karthik.
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Diff pair *uncoupled length* while routing at an angle of 45 degrees
Hi! I noticed that when I route my differential pair at an angle of 45 degrees then in Constraint manager the value of *uncoupled length* is increasing. Does it mean that the spacing is different while...
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Annotation fails on homogeneous parts
Hello,On Allegro Entry CIS, I have a design with homogeneous parts inside. These parts are named U?A, U?B.When I run an incremental annotation, the first part in the sheet is numbered (U1A and U1B) the...
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cross probe from dxdesigner to allegro.
i have a ref design from xilinx which has a schematic of dxdesigner,a layout of allegro.but i can't cross probe between them.i had used capture & powerpcb before, there is a dde function by which...
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Error Message Displayed when I give path of dsn file
Hi all I have created a design by defining new parts in the library and I have included these parts in my schematic. However, when I give the path of the DSN file the following error message gets...
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Putting track problems on the corner of the chamfering?????
Hi..I had routed the sample board and then when i am trying to slide the track means that time the corner of the tracks is been cutout. i don't what is the problem for that?I had attached the png image...
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How to put the copper area for the several nets in the PCB?
Hi I am concentrating on the BLDC motor drives, with three phase supply. After putting the tracks the specific area on the drive board is been get heating, so we have to provide that copper area....
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How to enable & disable legends on the pcb board?
Hi.. I created the drive board and then it had been get to be finishing stage. Before that we have align the top and bottom side legends. For that i had used the color dialog option and then i had...
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How to unroute the copper traces on the board at single execution?
Hi.. I had finished the board with of the top and bottom layer of traces with the 1 OZ of copper. There is some corrections made in the schematic and net list has been get updated, so i want to remove...
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