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Symbol corruption after update
Hi,I had used some shapes for pads of my symbol. I changed shape origin and updated pads and symbol.Although everything is right with the symbol and pads are in the right distance, my symbol pads are...
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Capture 16.3 - Can't move any component in schematic
Hi,I created a schematic in Capture 16.3 and I can no longer move any part or net. Whenever I try to move anything, it shows "Object move not completed as this resulted in connectivity changes". Does...
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how to link the CIS Part manager with a database Microsoft access (.mdb)
I have a database(.mdb), i want to use it in cis ,when I select -option--->cis configuration--->New , i select my database then i have this message : ERROR (ORCIS-6245) ; Database Operation...
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Schematic symbol pin name. OrCAD 16.3
Hello everyone,I'm new here and also new to Cadence OrCAD capture.I'm currently used OrCAD16.3 to build schematic symbol and have the error as the picture below everytime I trave to save or close it.Is...
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Variant Mode in TCL scripting
Hello there, For several months now, my mission is to create TCL / Tk scripts in OrCAD Capture to have new tools to automate various tasks related to the design of schematics. However, today I am...
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2 different footprint libraries
In the file Capture.ini I have the entry:[Allegro Footprints]Dir0=C:\Cadence\SPB_16.6\share\pcb\pcb_lib\symbolsAt this place I find files with the endings .dra .psm .osm .jrlWithin the pcb editor I...
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how to make Die bonding IC package?
I have few questions to ask here(I am a new user), much appreciated for your help.1. How to make Die bonding IC package? I have pad coordiantes. Doese I need use Allegro package design tools? or the...
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How to neglect Same Net Spacing DRC
Hi,I need to place vias on my polygones. Although I have configured SMD pin to Thru via Same net spacing rule to 0 for my Power Net Class, I receive DRC error as OVERLAP?!. :-( Is there a way to bypass...
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Change a coppied via net and via arrange
Hi,I have copied some vias from other routed nets. I have a problem and that is I can't find anywhere to change this copied vias net property!.. Could anybody please help?I am also going to align some...
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How to create QFN footprint in OrCAD PCB Editor 16.6
Hello,I want to create a footprint for the QFN-16 package but OrCAD PCB Editor Package Symbol Wizard doesn't have one. Please guide me how to create one from scratch. Thank you very much.
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What version of Visual C++ is required for License Manager 12.03?
I am running only the license manager on a new machine to serve our license. We only have the 2010 version of Visual C++, and I am receiving a SxS error. What version do we need?
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a licence file for spb16.6 linux 32bit evaluation
as topic. i just installed it, when running allegro_pcb, it says retrieval of pcb_design_studio licence failed. tia
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Component reports w.r.t type smd or TH
Is their any option wherein we can create the placement reports from PCB Editor with component type/class specifying as TH or SMD package. File-Export-placement doesn't carry this info!
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Can't place via next to pin
Hi,When I want to route some tracks of pins I can't place via just near the pin, while for neighbour pins I can do it easily. I have also defined a Power class net for both of them with pin to thru via...
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What the drill size to be use in BB vias?
Hi..I am trying to work on the six layer PCB board. In that i had configured BB via for the layers what ever to be used in the board. But my doubt is for through hole via i had specified the drill and...
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Error parseString
Hi Guys, i have setup a board for RF DC Nets extra and it was working for the last few days however today when i go to add more components using the RF-PCB quickplace i get the following...
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Can't do pin swap! please help
Hi,I have read some posts here as well as below link from Cadance about how to do pin...
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How to create pad for SMD parts
Hello,I'm really new to the OrCAD layout and know nothing about this before. I'm sorry if there is any dump questions from me :)I'm try to create a foot print for this part. 1. First question is: As I...
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Create Netlist removes some net members of a Net-Class
Hi,I am working with Allegro PCB 16.6. I see a very strange phenomena in my design. When I try create netlist in Capture and load it to *.brd file I see that it has removed some net members of a...
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need directions about Signal integrity tests in orcad.
Hello , Can anybody please tell me about how to use signal integrity in Orcad . I want some detailed tutorials of how to perform Signal integrity on circuits . Thanks & Regards , sarat
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