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Cross section of .brd for import to Ansys / Percentage of Copper per layer

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Hello,

      I have been asked to provide a cross section / cutt-out of a .brd to send to Reliability Engineering for import into Ansys for Thermal Analysis.  Is there a way to cutt away unwanted sections of the design quickly?  The area of interest is under the package of a large BGA. 

      I am also interested in percentage of copper on each layer under this package.  I have ran a film area report, however the reported numbers are not in allignment with my manual calculations used for verifying the reports accuracy. Any ideas? Any and all help would be greatly appreciated.

Thanks,

Clint


Connecting symbol shapes to internal layer

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On the connector shown below I want to connect the shapes around the perimeter to the internal gnd layer. I have selected each shape and assigned the net "gnd" to each but I get no ratsnest showing a connection needs to be made. The status command does not show them as unconnected either.

Previously I would have edited the copper area to assign the net, then placed a "free via" to connect to the gnd plane. I don't see a method to get a small hole into the shape.

I tried to add pins to the library part, but that requires adding additional pins to the schematic symbol. Plus, can you even have a pin inside a shape?

Tom

(I sure picked the right avatar........)

OrCad CIS on mySQL server

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I am using OrCad CIS 16.5 and I would like to use my company server to host the CIS database. We are using mySQL. I have set up a database with the properties as described in the help and created a new odbm data source. However, if I want to create a new data source in OrCad CIS preferences it doesn't appear in the options. I was wondering if OrCAD accepts mySQL as data base? Does anyone have a document how to set up the database on mysql and integrate it into OrCad CIS?

Many thanks in advance.

Editing symbols

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Greetings,

A newbie here. I have used Orcad for a very little while, so a learning curve. I placed a transformer on the page, and want to remove the "pin numbers' from the symbol. How do I go about this? I have done the right click on the lead, then edit properties, hihlighted the "name" colum and get lost after that. I have tried to find the answer in the help menu, but....

Please, HELP!!

Thanks 

Voids areas on plane that won't go away

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In the attcahed picture I have some void areas in the gnd plane that I can not get rid of. I have tried turning all colors on to see if there was somthing hiding there, but nothing shows up. Screen redraws and closing / re-opening board file have no effect.

What are these mysterious areas and how do I get rid of them?

Tom

unble to read my stroke file??

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when i invoke the stroke editor, there is always  a message poped up. it's displayed " unable to read file***   this may not be a stroke file".

meanwhile I have my allegro_strokes file under the directory of text.

pls help me !!

 

 

Orcad Capture cs lite display problem

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Dears,

 

Whenever I press the Edit simulation profile settings, the tabbed window opens but with missing value fields! I changed the resolution all the way and still not showing the fields its like it needs a resize of the window, and I cant resize it. This only happens on my sony vaio.

However on other laptops and workstation it works fine :<

Any ideas?

 

btw Am running windows 7

 

Problem on sony vaio:

 

 Problem

 

Normal working condition on other laptops/workstations:

 

 

 

Normal

 

acid traps and silkscreen check-166

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hi,

 is thr any methods to "check" the acid trap on pcb and to know the "silkscreen over pads" using allegro pcb tool

 not looking into adding the fillets/gloss

 

thnx


converting Orcad SDT 4 to Capture 16.5

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Hello, 

I guess it was alrady explained in another thread, but I couldnt find any Search button here, so I will ask again.

 

I am trying to convert schema from old orcad (.SCH) to new capture  (.DSN). All goes well till the end, where it throws error:


*** Translating Page 'H:\TEMP\ELDRCP21.SCH' ***
Converting 16-bit schematic 'H:\TEMP\ELDRCP21.SCH' to 32-bit schematic 'C:\USERS\SKOCH\APPDATA\LOCAL\TEMP\ELDRCP21.SCH'...
INFO(ORCAP-39064): Conversion complete.

Cleaning up 'C:\USERS\SKOCH\APPDATA\LOCAL\TEMP\ELDRCP21.SCH'...
WARNING(ORCAP-39027): Cleanup Schematic

Non-Orthogonal Wires/Buses found, need to be checked.
INFO(ORCAP-39067): Cleanup complete.
Could not find H:\TEMP\ELDRCP21.OLB
ERROR(ORCAP-21096): Cannot find part 'G' at 11.30, 8.90.
ERROR(ORCAP-21102): Translation failed.
ERROR(ORCAP-21103): Translation Notice.
Error(s) encountered. Please check the Session Log.

===================

Where G is not a g-spot but a symbol  for GND.

What should I do to get rid of this problem?

Is there some list of those ORCAP messages?

Thanks for any valuable help

PCB Editor - Replicate / Create

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We used this command in training class so I know it works...........

I'm trying to use it on a new design. I have four "rooms" and the associated components "quick placed" into those rooms. In one of the rooms, I have placed the parts in the order I want them.

According to the instructions I have, in placement edit mode, select the placed components, hover over one of the selected parts and RMB. The pop up menu should have the "place replicate create" option, but mine does not. I get a menu with "align components", "unplace component", "show rats", etc....... No replicate option.

What am I doing wrong? Like I said, I used this command in training and I'm following the instructions we were given.

Tom

Viewing artwork

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For some reason, I can not view the artwork I just created. The photoplot.log file shows they were generated with no errors. The file sizes of the .art files seem reasonable so there is data there.

When I select File-Import-Artwork, I can select the .art file I want to view, but when I select OK, it is not attached to my cursor. I know this works because we did it in class. In fact I have followed the class tutorial (setting up a new class/sub class to avoid the DRC's when importing into the etch layer) to the letter and it still no-workee.

Thoughts?

Tom

top side via tenting on thermal pad

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Does anyone have any suggestions on creating footprint with thermal pad that requires topside via tenting on the top side?

I tried making shape symbols for solder mask/ paste mask, but due to the void in the shape it requires I am not able to create it. 

I can place the shapes manually in package geo/ SM or PM, but I think lot of the data does not have it to display in the default setting for our filmsetting.

Please let me know if there is a way to make the shape symbols or not.

Thanks in advance. 

Program Skill Development

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Hi all,
 
 I have to realize a project about PCB. To do this I have to use SKILL language. 
 
 My subject: I have to write a SKILL program which automatizes the creation of text block. In fact I have to use a library to take PCB dimension, and text block format (A4, A3, ...). Then I write a script which calls many functions to do that.
 Well the text block need to be fill with information of PCB (Client name, no Pb in the PCB, Date, name of responsible, etc...). Informations are present in text files, So I have to take them, put in text blocks, select format of text block, and then, generate the Gerber files.
 
 Anyone could help me please.
 
 English is not my native language, so please ask me for more information. It's very important for me and urgent.
 
 Thanks

Command viewing

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I should have written this down before when it was answered, but I can't find it.........

How do you turn on the viewing of the command string being executed in the command window?

Tom

how to make an offset solder mask relative to PCB land?

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Hello,

I am trying to create a padstack for an LGA package, and the manufacturer suggests an offset solder mask relative to the PCB land - in this particular case they recommend a solder mask opening equal to the PCB land length + .3mm, with the solder mask extending .05mm beyond the land on the inner edge, and .25mm beyond the land on the outer edge.

I don't see an obvious way to do this when I create the padstack (the padstack editor centers the solder mask on the pin), and I'm not aware of any way I can select and move only the solder mask part of the padstack when I'm editing the component footprint. I thought perhaps I could create two padstacks - one with only copper/paste mask, one with only solder mask, but I'm guessing I'll have twice as many pins as I need if I do that.  Any thoughts on how to accomplish this the "right" way?

I'm using PCB Editor 16.5.

Thanks in advance for any help!


Cross section tool and impedance calculations

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I ran into something the other day and have been working with tech support on, but thought I might get some answers here.

Four layer board, two inner layers set to planes (and shield) FR4 material.

In the Setup - cross section tool, when I try to calculate the trace width based on a given impedance and stack up, the impedance is always 60 ohms. For example, I open the cross section tool and select Show Single Impedance.  The default impedance shows as 60 ohms. If I try to change it to 50 ohms by manually editing the cell, it resets to 60 as soon as I click out of the cell.

If I try to change it by using the drop down boxes at the bottom of the window; Layer Type - Conductor; Material 1oz cu; Field set to - Impedance; Value Set to - 50; then select "Update Fields", nothing happens.

We tried multiple things yesterday. I even sent the board file to tech support and it works just fine for them (figures.....)

I tried it on a different computer at my home office and the impedance is displayed in exponential format, not in ohms.

A couple of screen shots:

drc error

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does anyone knows how to solve this error or is this error not important

PP/NP overlaps OD >= 0.25

this error is located at the contect (metal1 to p-substrate and metal1 to n-substrate )

Error on NC drill (by layer) output file

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Hello,

I am designing a 4 layer board with some blind/buried vias. So on “Manufacture -> NC -> NC Drill” I selected under “Drilling” the option“By layer”. There are then generated 3 output files “file-1-2-np.drl”, “file-2-3-np.drl”and“file-3-4-np.drl”.

In order to probe if everything was all right, I placed on the board 4 mounting holes (the same symbol four times), but on the output files 1-2 and 2-3 I got

 

X17000Y-17000

X-17000Y-17000

X-17000Y17000

 

While on the file 3-4 I got

 

X17000Y-17000

X-17000Y-17000

X-17000Y17000

X17000Y17000

 

So, one of the hole is only visible on the last layer; something like a blind via but it is actually a passing though hole. I repeated the process several times and the output was always the same. In fact, I discovered that the last hole that I place on the PCB is the one that has the error on the output files. If I choose the option of “Drilling” “Layer pair”, the output file is correct.

Am I missing some configuration? Or maybe am I doing something wrong? Any ideas?

I’m using Allegro PCB designer 16.5

Thank you very much.

Cannot add pins to a block....

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I am encountering a problem adding pins to a block. Oddly this is only affecting the right hand side of the block (the output side).

I can add pins (Add Pin>type the pin name> click on the block at the particular location) on the left hand side but the pins refuse to be placed on the right. Oddly on the right hand side of the block there is a pin with no name attribute shown, which i have attemped unsuccessfully to delete. How this came to be here, i do not know (i am a newbie), but i suspect this may be preventing the placement of pins.

How do i remove the unidentified pins?

How do i interrogate the block to identify why i can't attach pins?

 Any help would be appreciated

J

4 layer design stackup

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Anyone doing this with ground on layers 1 & 4 and signals on 2 & 3?

Surface mount components on one side or both sides.

Pro's and con's?

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