I am trying to figure out how to use the ECS in relative propagation delay in the main ECS workbook. I can create an ECS and then an ECSM but the manual is very confusing . I also have a board that uses these types of ECS but not sure how that is working. Is there any manual , app note or tutorial that explains how these work ?
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Relative Propagation Delay Electrical constraint sets.
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32 bit LMtools for 64bit 17.2 sw
My server is 32 bit OS and the client wants to use 17.2 software. 17.2 support only 64bit.
Can we link 32bit server_lmtools with 64bit client_SPB17.2?
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How to find out wrongly connected Port in hierarchy Schematics?
Hi there,
Recently we found a stupid error in a rather complcated circuits design. As follwing picture shows, two power ports MGTAVCC and MGTAVTT are wrongly connected to one another. But commmon DRC can not find out this kind of error.
Is there any effective method to find this error by Cadence DRC?
Thanks very much.
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Can't open older version of OrCAD after installing new LITE version
Hello,
I have just installed the new 17.2 LITE version of OrCAD. This works fine but when i want to create a design i tried going back to OrCAD 16.6 and i get the errors: 'The program can't start because cdn_sfl401as.dll is missing from your computer. Try reinstalling the program to fix this problem' and 'The program can't start because cnlib.dll is missing from your computer.' from OrCAD Capture and PCB editor respectively.
I have seen forum posts about changing my directories but I'm not sure what to change them too?
Here is my environment variables after i attempted to update them to the folder with orcad 16.6 version:
cheers
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Converting projects between old and new library
Hi all,
Due to some infrastructure changes, we have the opportunity to change our library. During the years since we first switched to Cadence we've found that our library could be improved in a number of ways. The library is all set up and being exported, but we will need to convert our projects (both completed and in-progress) from the old to the new library. This can be done in Part Manager, part-by-part, but there must be a better way.
The library changes mostly fall into a few different categories:
- Libraries names have been changed (cells have only been moved around)
- Attributes have been added and changed
- Key properties have been reduced (moved the injected)
Note that both libraries are held at different network locations to make them site-accessible.
I have to believe that other companies have also done a library migration. Has anyone done that before? Do you know of any tools or services (I expect paid) that can help?
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Exclude pins of differential pairs?
Hi,
I'm using Allegro 16.3 with the -L performance option.
I have a CAN daisy-chained diff pair that has a header connector and optional termination components connected to the diff pair traces.
These are throwing off the length-match drc.
Is there any way to exclude the trace stubs or pins that are connected to the diff pair in the constraints?
Thanks,
Dan
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How to make the ground plane darker.
I just placed a ground plane, but when I print it out this is not dark enough. I need it as dark as a padstack.
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Schematic back annotate error?
Hi,
I am using cadence 16.0 facing a trouble on back annotating the schematic, it gives the following error
{ Using PSTWRITER 16.0.0 s001Aug-07-2017 at 20:02:13 }
Starting the Swp file dumping process ...
Loading netlist files ...
Loading... E:\LAYOUT/pstchip.dat
Loading... E:\LAYOUT/pstxprt.dat
Loading... E:\LAYOUT/pstxnet.dat
packaging the design view...Loading physical design view ...Loading... E:\LAYOUT/funcview.dat
#1 Error [ALG0037] Unable to read physical netlist data.
#2 Aborting Swap file creation... Please correct the above errors and retry.
please help me to resolve it!!!
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Error when trying to Rename RefDes
Hi, I am using OrCAD PCB Designer V17.2.018. When I try to Manufacture > Auto Rename RefDes > Rename..., using Default Grid, Rename all components checked I get:
Auto rename of reference designators in progress...
No components found on subclass TOP and BOTTOM.
E- (SPMHA1-390): Cannot open the log file.
I've done this before and had no problem; I've looked at everything I could find with no luck.
Anybody have any idea what is going on?
Thanks & regards,
John Madsen
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Mirror printing and copy
I need to print out the top layer in mirror plot orientation, but when I do it some padstacks are gone. If I print out the same plot in normal orientation the padstacks are there. How can I solve this?
Also, I would like to print out some copies of this plot on the same sheet in order to save material, but it is not possible to copy and paste. Does the replicate option mean that I have to make the complete circuit again in the schematic?
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Pspice simulation error
Hi,
Run the latest hotfix 17.2\Hotfix_024 getting this error below
Any ideas, path exist. its not read only.
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How to connect mechanical pins with connector pins
Hi all.
I purchased a few parts and I want to build a few test fixtures for them. Some of them are SMD, others are thru-hole. I finished all circuits expect the location of parts. For SMD I want to create 4 pieces of silver(each silver is for one corner of the part) and mount the SMD part on the top, lastly connect the silvers to the rest of circuits. For thru-hole, I want to drill two holes and do the similar things. Right now I created the mechanical symbols for the silvers and holes, but I have some trouble about how to connect them to the rest of circuits (Let's say, a resistor). Simply draw a wire is not working. The error message is, 'DRC error: Line to Thru Pin Spacing. Actual value: 0 mm'.
I tried for a long time and cannot make it to work. Will anyone give me a hint? Thanks.
Adam
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Components placing issue in allegro 16.2?
I have place some components into the board manually and rest are unplaced.Now I have stared to route the traces.After routing some tracks.I need to place some more components into the board.At this point of time System show a Error Message and Exit.Please suggest the solution.
Error Message.
System encounter error .contact to cadance supports.
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How to create part with multiple layers?
Hello,
Fairly complicated post but I can hopefully explain it:
Right, I want to design a part which is a SMD part which has pads on two layers; in this case top and bottom, connected with vias. This is what it looks like currently (the idea is I need to replicate this board with a few adjustments, however, the original library isn't available anymore):
So, as seen above, there is the 3D view, the view of the original part detached from the board and the schematic representing the part. The large red pad is ground and so are the large green pads i.e. pins 2,3,4. The small red pad is the DATA_CH0 pin.
Here is what I can get so far:
Any idea how to flip pin 17 and 'mirror' it on the bottom?
Cheers,
Fraser
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Making component references globally unique across multiple schematics
Hello,
I am adding to an existing project in Allegro Design Entry with multiple schematics, and I want to ensure that component references (locations) are globally unique, i.e. that no two components in any of the schematics have the same name. Checking each schematic for internal duplications will not do. If I can generate a BOM for each schematic, I can merge them in a spreadsheet file and check for duplicates there. However, because the schematics are in a rough draft state, there are errors, so I can't package them in order to generate the BOMs.
The errors are mostly caused by unnamed components named R?, C?, etc. The packager detect the presence of two components with the same name but different values, and refuses to proceed.
Is there a way to generate a list of the refdeses in a schematic without packaging it? Alternatively, can I force the packager to complete in spite of the errors?
Thank you,
Chris
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customize pad shape(Semi-circle)
how can create a Semi circle pad stack in allegro 16.2?
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Exporting Gerber layers as DXF files
This there a simple way to export all of the Gerber layers as DXF files? Using the Export -> MCAD -> DXF for each layer is extremely tedious.
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menu change between v16 and v 17
1. Why do you have to keep rearranging the menu and menu items in Allegro?
2. Where the f is the "Create Module" in v.17? It was under Tools in v.16.
3. Who is the genius behind this chance?
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Custom shape etch - How to attach to pins
Hello,
I'm trying to copy this design:
And I'm wondering what is the best way to go about creating the highlighted shape that is the trace etch.
Here is my attempt:
Obviously, my attempt is very basic but it shows how one attaches and the other does not.
1) Why does one of my shapes not connect?
2) What is the best way to go about creating these shapes?
Cheers,
Fraser
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Distributed Cadence site repo for multiple locations (AWS, Azure, etc.)
We're interested in going to a distributed model where all Cadence users in different geographic locations can share the same virtual network path. This would be easier on maintenance as we would have one repo for all CDS_SITE stuff regardless of location (currently we mirror but there are a number of differences between sites which is a pain).
Has anyone done this? Can you share your experience?
In limited testing, it was too slow to use the public internet. (Regular and frequent freezing/stuttering during layout, very slow invocation of Component Browser in schematic, etc.) We have better results using our dedicated link, but that was only between two sites that weren't extremely far away. We haven't tried using "the cloud" but I'd like to hear anyone's experiences to give us a running start.
FYI, we understanding WAN licensing and other issues. Licensing is a separate issue for us from hosting the items at CDS_SITE.
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