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How to use tabs in the new Allegro GUI?

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Dear All,

the new GUI of Allegro gives the possibility to use tabs to open multiple layouts. 

How to use it?

Also, how many licenses are used? one per layout?

Thanks


Francesco


STEP Question

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We want to start using the 3D aspects of PCB Editor.

I'm able to output a STEP model of the PCB, but there is no component height associated with the parts.

I have watched a few on line videos that show how to use the STEP mapping command where, for example,  you can easily associate an 0402 footprint to an 0402 STEP model.

The question is, in my STEP Mapping window there are no available STEP models to map my footprints to. Are these models something I need to generate and if so, how do I generate them?

Thanks, 

Tom

PCB Editor Immediately AutoSaving and Closing When Opening Design

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I've got an installation of PCB Editor that will open a design, but then will immediately auto-save and close.  Immediately after loading the design, it says
Auto saving before quitting, please wait...." and then closes.  I don't see any error messages and it doesn't seem to be crashing.  It's just Auto-Saving.  An AUTOSAVE.BRD file is created.  Weirdly, if I go into User Preferences-->File_Management-->Autosave, the autosave option is not checked.

It happens on multiple designs, some that have previously worked.  It seems a bit random.  My workaround has been to keep opening other designs until I get one that stays up, then I can go to recently opened designs menu and open the previously shutting down design without issue.

This was happening on my v17.2 S001 installation, so yesterday, I updated to S038, hoping it would solve the problem.  The first design I opened had no issue, so I thought I was good to go.  However today, I tried to open that same design and it encountered this issue.  I then found a design that opened and used my workaround.  As a test, I closed the problem design and opened the one that just got me in again and that design encountered the issue.  I'm at a bit of a loss as to what's going on.  Does anyone have any suggestions or troubleshooting I can go through?

Thanks.

--Mark

Cadence Specctra (Allegro Router) 17.2 Issues in Windows 7 Pro (64 bit)

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Folks,

Been having this issue since I installed Cadence SPB 17.2 (now at ISR 37).  All products work fine EXCEPT Allegro Router or Specctra as it was originally known.  Once opened up, you cannot quit unless you go to the the Windows 7 Task Manager and "end" the application.

Here is the funny thing, I have VMware Workstation Pro installed with Windows 10 (64 bit) Pro installed and I can run any Cadence SPB 17.2 Allegro product within that environment and everything, including Specctra, work perfectly.  No problems at all!

Question:  Does the Specctra product in version 17.2 have issues with either Windows 7 or could it be the Graphics card (Nividia K600 PCIe16 with 1 Gbyte RAM) cause this issue as when I am inside the VMware machine in Winodws 10, I am using the VMware video driver, not the Nividia software driver.

Thoughts...especially from Old Mouldy!

Thanks!

Chris

generating Xnet from netlist or inside constraint manager

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Hi to all,

i need to create some Xnet inside my pcb but the 2 nets (or more) are divided Not from a capacitor or resistor but with an IC.

so ask: is there is a possibility to generate these Xnets from a description in the Netlist or adding some attributes in the nets, or adding them directly on some way inside the Constraint Manager?

any reply will be appreciated.

have a good day to all.

Livio

Collision Detection with PCB in Allegro 3D Canvas

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In Allegro 3D Canvas, is there anyway to include the PCB in the Collision Detection calculation?  It seems like it detects collisions with symbols just fine like the components on the board and the mechanical enclosure, but it does not include the PCB itself.  Obviously, if the PCB is colliding with the enclosure that would be problematic so I was just wondering if I was missing something here or if there is another way to accomplish this.

PDF Export--> Name duplicating

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Hi,

I am trying to export pdf in Allegro 17.2 its getting successfully exported however file name is duplicating as shown below. Could  someone please help me to solve this problem?

"SENSOR_PARA_REV0_SENSOR_PARA_REV0.pdf"

Thanks,

Sanjeev

shapes void corner not in square in allegro 17.2

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I'm facing the issues after draw the shapes around the square pads, the shapes to pad void come as arc corner, i'm looking square corner,its possible in allegro 17.2?

in allegro 16.6 its comes with square,  please help this issues.


Design Entry HDL - is it possible to create an attribute that links one part/page to another?

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Hi,

I am trying to create a clickable PDF for a hierarchical schematic - I need to link the hierarchical block to a page/part on a page in order to improve the readability of the schematic.

If this is possible, please advise me how to achieve this.

Placement Quickview not showing pads

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Hello,

I am a newbie to PCB editor.

I have seen videos in which, when placing components manually, in the placement pane's "quickview window", you can see the outline of the part and the pads.

I am only seeing the part outline and silkscreen, no pads.

How do I see the pads in the quickview window?

Thanks,

Emmett

Allegro Physical Viewer Crashed During Review

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Hello,

Allegro Physical Viewer has been crashed multiple times when I am moving my cursor to visibility tab. I have installed the latest version of the allegro physical viewer. 

I want to learn PCB design

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I want to learn PCB design , is there anyone to give suggestions that how to start , and what need to learn about frist ?

Best regards

Thejigsaw

removing inherited fixed properties on a symbol

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When I select a symbol  it also highlights certain clines segments and vias. Some how these are inherited to the connector. How did this happen and how do I remove it ?

Add connect bubble mode creates DRC errors.

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When I add connects in bubble mode , shove preferred, Shove vias full, and I add a via the software moves lots of clines and vias but generates drc errors and lots of runny looking clines.  There was room to easily move two clines and add the via without generating lots of DRC errors. I thought add connect in this mode is not supposed to generate DRC errors ?

Where is the paid-for Allegro-Physical Viewer Plus in 17.2?

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In 16.6, there's Physical Viewer, the upgraded viewer that allows engineers to make notes on the board file but keeps them from going full "Martha Stewart" on other people's circuit blocks.

Stacked microvias are awesome in 17.2, but... now I'm stuck..

Thanks.


Upgrade the part properties in exiting design

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Hi All.

I am updating some properties of symbols in libraries.

How to update these properties automatically in the existing design files . Is there any option in orcad to update the design files wrt to libraries? Do I need to write any scrip for it.

Cadence Tool License : Orcad Capture 16.6, Orcad Lite - CIS, PCB designer professional, PCB designer standard.

Thanks in advance

Pradeep 

Cadence Schematic Tool

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Hi Everyone,

Here I am requesting for the feature in Allegro Concept HDL (Schematic)

We need an option in schematic tool itself to define major components and connector interfaces placement as an add on feature which can be used directly into PCB design from the net list package. New placement option in schematic tool will fetch all the available components Ref-Des, so schematic design engineer can able to set required component placement.

 

Current Problems:

  1. Currently, Schematic design engineer need to draw rough sketch about the major component placement based on their project need.
  2. Also Schematic engineer need to sit with PCB design engineer for 1/ 2 days to help the component placement.
  3. External tools(Visio, Paint, etc.) required to define board layout dimensions and component placement location

Thanks & Regards,

Vinoth Raja

 

 

 

sigxplorer stimulus setting question

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Hi sir,

I set driver stimulus type  in In cedence 16.6 sigxplorer stimulation.I can set frequency,pattern, etc in custom type. But rise time or fall time seems to be fixed at 0.167ns.

It is too large at high frequency such at 6Gbps. Wether the rise time can be changed? or any other stimulus I can use(I can not find any other one except below shows)

Pad Editor thermal pad and anti-pad: when are they applicable?

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Hi all,

I want to ask about thermal pads and anti-pads and when they apply to a Allegro. I know thew theory behind them, but i do not understand when and how they are used in allegro. Are they applied only on planes? and why only on negate artwork planes? I find useful that you can setup a thermal relief for a specific pad and not go to each pad in each shape and change from the  shape parameters. And when you have a big shape that has many different pads from many different parts, I want to have different thermal reliefs and anti-pads on each one. Is that possible?

Thanks,

Theocharis

configure the Symbol_MaxSymSize directive in the setup.cpm

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I got an error when creating a symbol I thought I changed the sheet to F and I am not sure why it was too large, but should be able to work thorugh that, I was looking at the sybol_maxsymsize so I could increase it from whatever the default is so that I don't get this error while debugging. I was wondering where I find this as I have gone through the setup on the splash of my project cpm and looked through setup->tools-> project manager, design entry hdl and the pcb editor setups and I don't see the maxsymsize directive.

SPLBPD-215 Symbol 'sym_2' : The size of the symbol is greater than the maximum symbol size allowed. Reduce the symbol size by modifying the symbol outline or configure the Symbol_MaxSymSize directive in the setup.cpm file according to your requirements. Error
SPLBPD-216 Symbol 'sym_2' : The size of the symbol is greater than the sheet size. Choose Tools - Setup - Symbol to specify a larger sheet or reduce the size of the symbol by modifying the symbol outline. Error

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