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Allegro 16.6 differential line how to set up XNET through a series of resistors and capacitors in series

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HI ALL:

           Several sets of differential pairs connect a resistor and a capacitor in each network. How to set XNET to make these groups of differential pairs equal; after create model in signal-model-assignment, the corresponding XNET cannot be completely generated, some networks will be lost, or still Net form, but some are XNET; how to set up XNET that spans two or more passive devices? How is it different from bridging a single passive device。

     best regard!

     Terry!

.


Regarding Allegro PCB Editor and Design Entry HDL.

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I have a question that i am using Centos linux version for Allegro PCB Designer and Design Entry HDL but it is again and again getting crashed while doing export physical or after sometime. ? what is the problem ? Please Help

No decompose option for fillet option

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Hi

I defined my board outline using polygon and i cannot just use fillets by Manufacture>drafting> Fillet.

But even if i try to use Shape>Decompose option(which doesnot exist). Unable to make fillet board outline that way.

Using orcad 17.2

Creating Footpring for Component with Elevated Section that Allows Other Components Mounted Under it

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I have a model that I want to make a footprint for -- the actual component looks like this:

Where the 4 cylinders shown are standoffs which are designed to be soldered onto the PCB. Accordingly I designed the PCB footprint to look like this:

I'd like to allow small components < 4mm tall to be mounted to the pcb under the component in this area:

What layers would I use to set this up correctly without setting off DRCs in either the symbol or PCB design?

ground plane/pour

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i'm trying to add a ground plane to a board. i am following a tutorial. everything works good following instructions but in the tutorial the ground plane has a transparant color.  my rectangle has none and i've been unable to find a way to do it.

any help appreciated.

Assign net class in object property

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Hello,

 I would like to set net classes into schematic.

The only way I know is setting a common BUS_NAME then I make a class into BRD file where the only memeber is the bus BUS_NAME

Is there another way?

Thanks

Stefano

Allegro: How to correctly set modulepath for design re-use.

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In Allegro, we can set a modulepath similar to padpath, psmpath, etc, by doing:

File > Setup > User Preferences > Paths > Library > modulepath [...]

I've done this, and linked a folder with a bunch of .mdd files:

The issue is when I go to use one of them (Place > Replicate > Apply) I still have to browse to the folder, and select the .mdd file I want to use. I figured by setting the modulepath, I'd have access directly from the RMB menu.

Is that now the functionality is built?

TLDR: What I'd like to do, is save a .mdd in my module path, and be able to use this in place replicate apply, without having to "Browse" and find it in Windows Explorer. Is this possible?  

Rigid flex Cross section PCB

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Hi

I am looking into designing a 2 layer rigid and 1 layer flex PCB on PCB designer 17.2. The rigid area is decided but the flex area is not completely decided yet. Here is the cross section:

  

  • As you can see, FLEXMAIN has a polyimide dielectric. So is it required to have polyimide dielectric in the rigid(PRIMARY) area as well? or is it ok this way?
  • If i go for Semi-flex(flex to install) PCBs and drop this FLEXMAIN(Flex) option, what layers have to be assigned to that? Would it only be copper(conductor) layer and soldermask flexible then?

Selecting Multiple Components in OrCAD Capture

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Hi,

If I have, as example, 4 or 5 (or more) components on different schematic pages, how does one first FIND selected parts, then have one place to edited their properties.  This is very useful if you are tasked with updating some existing schematic design and with existing reference designators, but those parts are now different in value and need their database updated.  I know if you are on one page, you can do the usual hold the cntrl key while selecting different components, then right clicking the mouse to get to the properties page...great!  However, when those components are only different pages and not clearly in eyesight on the computer screen, this becomes problematic.  Also, the parts Browser is not much more helpful as the entries are in the a direction (left-to-right entries) which is not easy to edit like the edit property window is for multiple components.

How does one get the same effect as a single page mutiple component selection with components using the strl key and mouse selection on different pages with the same editing as available with the properties editing window?  BTW, this is for SPB 17.20.058.

CT

Creating ESpice model is not resulting in an Xnet?

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Hello everyone,

I am trying to create an Xnet for the first time ever. Driver, resistor, and receiver. I have looked at user guides which have told me to create an ESpice model for the resistor in question, and that when the model is finished I will automatically have an Xnet "connected" to it.

Creating an ESpice model was no problem. But I cannot find an Xnet at all? I have tried searching in the Find pane and also in constraint manager, but nothing at all comes up. Have I missed something? I need to Xnet to extract into SigXplorer.

I am using PCB Designer Professional 17.2.

Thanks.

allegro17.2 How to Set Maximum Stacked Vias

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In 17.2, is there a way to set the maximum amount of consecutive stacked vias in a design.

Here's the example,

L1 to L5 can have stacked uvias. We want to have the maximum amount of stacked vias at 4. We don't want any L1 to L5 vias but L3 to L5 vias are ok. Every other combination of stacked vias would be allowed.

Instead, we want L1 to L5 vias to go from L1-L3 and then dog-bone to L3-L5 uvia.

This is in response to IPC issuing a warning on reliability as it relates to stacked microvias (Source: https://epsnews.com/2019/03/06/ipc-issues-warning/)

Ratsnest during move has changed? 17.2 HF60

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I'm seeing a major change in ratsnesting during move (ripup = ON) that was not present in 16.6.  In 16.6 if I move a specific component that is routed, when moving that part with ripup on, it properly rips up the routes and ratsnests all of the pins during the move.  In 17.2 HF60 the same board & part does not have the same ratsnest behavior - it will not rat all of the nets are connected to the part.  It appears that any nets connected to the part that have multiple pins in the net will not rat those  pins during the same move condition.  What changed?  How do I change it back?

How to fix convergence problem in SigXplorer?

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Hi, 

I am performing "tlsim" simulations on a net in SigXplorer that I have extracted from PCB Editor. Occasionally, I fail to run the simulation because I get a serious warning about a convergence problem.

The weird thing is, I have successfully simulated the same net with the same simulation parameters before. So I feel like there is no problem with my setup, these convergence warnings seem to pop up at random.

Has anyone else experienced the same thing? Any ideas on how to work around it?

Thanks.

Selecting components from one occurrence out of 14 in the Property Editor

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I have a hierarchical design with 14 occurrences of an instance. I want to assign all components in one occurrence to a specific ROOM, that is, setting the ROOM property of all components in one occurrence to for example AD1, and the components in another occurrence to for example AD2 etc. How can I do that in the Property Editor in an easy way?

When selecting all components in the schematic page and opening the Property Editor I cannot find a way to select only the components belonging to one occurrence, which means that I need to manually edit the ROOM property for every component in every occurrence. With 100 components in the schematic page that equates to 1400 edits... 

/F

Hand tool in Allegro Design Entry CIS

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The middle mouse button can be used to pan in a schematic page, but I find it slow and not very accurate. Is there a way to change the behavior so that it behaves like the hand tool in for example Acrobat Reader?

In the PCB Editor there's a preference (designhdl_pan) for setting this behavior. Is there a similar option in ADE CIS?

/F


Restore deleted CIP record

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We have accidentally deleted a TMP- part from our CIP. Does anyone know if there is a way to restore this part?

Thanks
Jeff

how to use tcl/tk to replace user property

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i want to replace all part property "PART_NUBMER" to "Part Number".    

i find "OrCAD Capture TCL/Tk Extensions" may be useful,but i have no idea how to use it.

1 simultaneously manipulate all the parts on a schematic page and add a custom property “PartVersion” with a value of “1.1”,

proc addPropertyToAllPartsOnPage { pPage } {
set lNullObj NULL
set lStatus [DboState]
set pPartInstsIter [$pPage NewPartInstsIter $lStatus]
set pInst [$pPartInstsIter NextPartInst $lStatus]
# iterate over all parts
while {$pInst!=$lNullObj} {
set lPropNameCStr [DboTclHelper_sMakeCString "PartVersion"]
set lPropValueCStr [DboTclHelper_sMakeCString "1.1"]
#add the property to part
set lStatus [$pInst SetEffectivePropStringValue $lPropNameCStr $lPropValueCStr]
set pInst [$pPartInstsIter NextPartInst $lStatus]
}
delete_DboPagePartInstsIter $pPartInstsIter
$lStatus -delete

2 Iterate over all user properties of any object

set lPropsIter [$lObject NewUserPropsIter $lStatus] set lNullObj NULL

#get the first user property on the object

set lUProp [$lPropsIter NextUserProp $lStatus]

while {$lUProp !=$lNullObj } {

#placeholder: do your processing on $lUProp

set lName [DboTclHelper_sMakeCString]

set lValue [DboTclHelper_sMakeCString]

$lUProp GetName $lName

$lUProp GetStringValue

$lValue #get the next user property on the object

set lUProp [$lPropsIter NextUserProp $lStatus]

}

delete_DboUserPropsIter $lPropsIter

materials.dat and masklayersitefile.xml

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hello

currently looking to have a  the materials.dat  and masklayersitefile.xml   defined in a path for all users company wide

reference

https://community.cadence.com/cadence_blogs_8/b/pcb/posts/why-move-up-to-allegro-17-2-2016-so-how-does-your-design-stack-up-reason-5-of-10

looks like the set materialpath  

is specific to masklayersitefile.xml 

and does not apply for materials.dat  file

it looks like, the masklayersitefile  does not replace the materials.dat file , but works in conjunction

what is the proper way to point those to a central location ?  

Meaning of Pin in Package Geometry

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Can someone explain to me what a feature drawn on the Pin 'layer' of a component's Package Geometry actually represents?

Dynamic Copper Clearance on an individual basis - How to ?

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Hi, I have this board with multiple small ground planes and I am trying to find a way to back off the copper more than what is applied at the constraint level. Assume a ground plane with a clearance of 25 mil globally I can pour the plane then go to "Global Dynamic Shape Parameters" and increase the oversize there for the back-off of the plane. This works fine but it is working globally which does not work in my situation.

I was thinking that editing the actual shape property via RMB, " DYN_Clearance_Oversize" might be able to accomplish this but no luck there.

Anyone Know how to do this ?

What I guess I am after is copper back-off based on the shape ID that would be independent of any other shape on the board. So the global constraints would be the base minimum then the shape ID + some parameter would increase the back-off for that particular shape based on the net that is attached to the shape.

Hope all that makes some sense

Thanks.

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