Cadence 17.2.
I'm using a library BB-via defined with only one layer (Layer = BONDS, just below TOP) and this is a connect pin of a part.
NB : I'm using this trick 'cos I can't use the Allegro Bonding feature since it is limited to 100 bonds with the std Allegro PCB editor package.
type: Blind/Buried Via
Hole data size = 0.0000
Design layer pads
Layer: BEGIN LAYER = DEFAULT INTERNAL = END LAYER = ADJACENT LAYER = None
Pad | Geometry | Width | Height | X offset | Y offset |
Regular | None | | | | |
Thermal | None | | | | |
Anti | None | | | | |
Keep Out | None | | | | |
Layer: BONDS
Pad | Geometry | Width | Height | X offset | Y offset |
Regular | Square | 0.0850 | 0.0850 | 0.0000 | 0.0000 |
Thermal | None | | | | |
Anti | None | | | | |
Keep Out | None | | | | |
In the package, info on pin is correctly defined on BONDS layer.
info on pin:
pin number: 120
Padstack name: BP_SQR_0-085
Usage: Bbvia
padstack defined only on BONDS
When I put the part in the PCB design, the pad is swapped onto the BOTTOM layer ????
info on pin:
pin number: U1.120
pin name: BANDGAP
pinuse: UNSPEC
Zone name: PCB_P1
location-xy: (64.5250 43.1875)
Part of net: N473817_HALF-SIDE0_ADC
Number of connections: 0
Reference padstack name: BP_SQR_0-085
Usage: Bbvia
padstack defined only on BOTTOM
pin is EXPLODED from symbol
padstack rotation: 270.000 degrees
Attached text:
class = PACKAGE GEOMETRY
subclass = PIN_NUMBER
value = 120
Properties attached to symbol pin
CLIP_DRAWING = CLIP_1
When I edit this padstack design, the padstack is correctly defined on BONDS layer, as in the library padstack put in the part.
=> there is clearly an issue there.
I did several trials withiout any success:
- db check
- delete part, repackaging, replace part
- update symbol, with and w/o 'Update symbol padstacks from library'
NB : I'm using also the Flex zones, but BONDS layer is enabled on the zone I place this part.