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simulation of harmonic distortion

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 how tomake asimulation ofharmonic distortioninorcad?
thank you


Need help tuning diff pairs---will PAY

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 Hi. In another post I was asking about diff pair tuning.....well....I just cannot figure how to do it. I am willing to pay someone to take the brd, tune the diff pairs and send it back with detailed explanation how it was done.  It HAS to be in either 16.0 or 16.5 XL

I need this done by Tuesday 6/18 LATEST.

 

PS This will probably be gravy for someone who knows their stuff.

How to change package design(.dra) to reflect in layout after placement of component is done

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I have made some modifications in the package file of a component (say changed the silkscreen or place bound), 

So I know by ECO mode the changes I made are getting reflected in the library. 

But if suppose I have placed the components already, in the board layout(.brd) , those changes are not getting reflected, 

Let me know where I am going wrong.

Templates and CM default values (PCB Designer 16.5)

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Right now, the Constraints Manager (PCB Designer 16.5) populates all the entries with default values (for example, 5 mil spacing minimums for everything).  Is there a way to change these defaults?

On a related note, as I understand it there are several different template files that can be used:

.brd board files

.tcf technology files

.xml parameter files

 

My general understanding is that using a .brd template would include all the .tcf information and some/all of the .xml parameter information.  Can anyone clarify this?

Ideally, by setting up the right template I'll be able to preload all the desired settings for things like minimum trace widths, class colors, thermal relief specs, grid sizes, etc...

Some Basic questions to select proper OrCAD Softwares

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Dear All,

I already downloaded OrCAD Softwares 16.5 demo software. I didn't find OrCAD PCB editor there. I have PSpice student OrCAD capture and other PSpice softwares. If I want to download entire demo version, it is too big, 1GB, and may take too long time. I have Schematic ready on my hand, made using OrCAD Capture. Is there any possible to download only OrCAD PCB editor only? If so, time can be reduced as much.

Also, like to know whats the use of Allegro software?

Advance thanks to all

Place by Schematic page...

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Hi All,

In one of our new design, due to large number of parts, we would like to place the parts as "Place by schematic page number". But in our tool the option is disabled. If anyone knows how to enable it, kindly help us.

Attached a screen shot for reference. Using Allegro PCB design L v16.01

Thanks,

Shiva.

Pspice Model editor commands and capabilities.

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Hello,

My name is Andy and I am currently working as an intern. At my jobsite, we have OrCad 16.5 avalible to us. I am trying to use the model editor for pspice to create parts that will have the actual worst case data behind them.

As an example, a milspec resistor may have %1 tolerance on its own, but this number increases with respect to the enviroment, how hot it is, radiation, life time of the part etc.. When everything is said and done, this number maybe 1.82%. I want to create a part that would have the proper part name and the tolerance on it so when a reliability engineer wants to run worst case analysis on pspice, he or she can directly pick the part from the library and place it on the circuit. I am also planning on automating the system of generating these parts and do it for thousands of different parts. The parts range from simple resistors all the way to transistors, even some stuff that has their own sub circuits like an LM117 voltage regulator.

My question is what type of commands am I allowed to use inside the model editor? I will be more than likely creating these files by exporting excel data in to text. Can I use functions? Are there ways of doing mathmetical calculations inside the model such as " dev=(R1*.01)%" or use Value statement etc..

Where can I get a hold of the complete valid command list for pspice models and subcircuits?

I may need to used add,subtract, exponent,min(),max(),log type functions. Can pspice models handle these functions?

No Pspice library for line driver and receiver

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Hello everyone.
I have the lite version of orcad and I have the following problem. I'm trying to develop a time simulation of a circuit with a line driver and a line receiver RS 422 but every time I launch the simulation shows a green dot on the drivers that report: "WARNING: [NET0093]
No PSpiceTemplate for U1, ignoring "

the components I want (drivers and receivers) are all in the capture library LineDriverReceiver but no PSpice library.

someone can help me solve the problem?
 
thanks to all
 
max 

Placement Edit not working?

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 I have two sites where I use PCB Editor. One at a customer / employer and the other at my home office. Yesterday I took a file from the customer to my home office to continue working on it last night. When I opened the file to continue placing parts, placement edit would not work, meaning that I could not move any parts or text I had to use the "move" command to place the parts.

This is a small board with maybe 30 parts. normally I would select placement edit and have only "symbols" checked in the find filter. This would allow me to select and move any part on the board. It was not working this way. With placement edit selected as well as "symbol" when I selected a part, the part would highlight but I could not move it. The only way to move the part was to use the "move" command which is very time consuming.

This function worked just fine earlier in the week (and on several other boards) and it works just fine at the customers location. (same versions of Editor installed at both locations)

So the usual question......... What am I doing wrong?

Tom

VIA SELECTION

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Hi all

Is there any way by which we can select any specific via in the PCB editor.

For e.g if there are about 10 types of vias in any pcb design and there is a via having name "60rd40" and i have to make the subdrawing of only one type of via for e.g "60rd40" then what should be the procedure?

Regards

Nayyier 

SMA/SMB footprint in Orcad 16.5

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Hi all, 

I going to use a SOCKET, SMA, RIGHT ANGLE, 50OHM in my PCB link here http://uk.farnell.com/te-connectivity-amp/5-1814400-1/socket-sma-right-angle-50ohm/dp/1248989

I was able to find the smb_90.dra and smb_90.psm files in the Allegro Starter / Evaluation Library Cadence_Starter_Library Downloaded from the Cadence web page http://www.cadence.com/products/pcb/pages/allegrodownloadsv2.aspx?regid=da188902c34d49be8fb3ffd88351b2d4

However there is no padstack available for same.
Can anyone tell where to get the footprint for the connector?I put these files in the C:\Cadence\SPB_16.5\share\pcb\pcb_lib\symbols. When I add the pcb footprint in my design The design check rules works good. But when I try to create a netlist in the design I get a 
WARNING:(ORNET 1119)NO spice template ignoring. And it ignores the connectors in Orcad Capture.

Can someone help me with the footprint for the same. 

Sneha

Artwork Generation

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Okay how do the pros set this up quickly? I find for each board it is a very tedious and painful process to get the correct folders set up and the classes and subclasses to get the silkscreen and soldermask and etch all setup.  I turn colors on and off in the workspace then add the folders and still find I work to do to get it all correct. In this regard I definately liked the simplicity of Layout but hope it's just operator ignorance. 

Thermal reliefs for vias used in SMD pads

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Hi all I am doing a design with via in pad for the first time and was wondering if there are any known soldering issues if you don't thermally relive the via on a plane? Normally we never put thermals on a via but have never put the via through a solderable pad before.

 

Thanks in advance to any and all answers.

Does anyone else dislike the "Line Width Retention" feature?

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Branching off from http://www.cadence.com/Community/forums/p/16025/1322497.aspx, which originated my question in that post.
 
Am I the only one who finds the line width retention to be a real pain and a hindrance to getting work done? We make heavy use of constraints in our designs, and so the line width is mostly driven by the constraints. In rare cases manual setting of line widths are needed.
 
I also keep the Options tab closed since it eats up valuable PCB canvas area, and I use keyboard commands frequently so I don't need to use the Options tab for most commands. The complex commands that require me to think and break from the placing/routing process don't cause must additional disruption to go to the Options tab, but when I laying down parts or copper I want to have all the monitor are available to see what I'm doing and I get along just fine without the Options tab open. 

If I make a manual change to line width, the next net that I route should typically go back to Constraint, because the constraint generally determines the correct line width for all nets. So this new feature means more trips back to the Options tab, wasting time.

If I'm working with a partially-routed cline, I usually want to pick up the line width of that cline. This is also annoying because the retained line width isn't always (in fact, it usually isn't) the line width of the partially-routed cline. Again, I have to make a journey to the Options tab which slows down my progress. Sometimes the partially-routed line width is picked up, while other times the last-used line width is used; I haven't figured out what makes either condition occur.

I can think of two options to make my life easier:

 

  1. A way to disable line width retention.
  2. Have line width displayed in the status bar of the Allegro window, so that I can easily see the current line width with the Options tab closed.

 

Also, as I mentioned in the post linked above, I want to change line width with the mouse wheel during routing without losing PCB canvas area due to the Options tab being open. Assuming I can do that, this becomes even more of a problem because I now have the ability to change the line width with the Options tab closed, and I have no way to visually identify/confirm the current line width. Nor do I necessarily know what line width has been retained (I can guess and with fairly high accuracy, but there's no UI feature to show me for sure).

Orcad PCB EDITOR 16.6 FOOTPRINT LIBRARY

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Hi @all!

I would like to know if is possible to download the footprint library ( file *.dra and *.psm) of the most popular component. 

I can not manually create each footprint!!! The standard footprint in  \SPB_16.6\share\pcb\pcb_lib\symbols are not enough.

Can someone help me???

 Thank's


How to change the solder mask of pads from top to bottom in brd file

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I placed the components on top layer and mirrored. Components have been placed in the bottom layer but some how the solder mask layer of the component pins is displaying as solder mask top.

It should change to solder mask bottom. Let me know some remedy for this, as I am facing this problem in many instances.

Strange Error when accessing OLB symbol library

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We recenlty upgraded from 16.3 to 16.6.  since then ive been experiencing the following Errors when i open the company OLB library. 

 ERROR(ORCAP-1558): Unexpected error in database access.
ERROR(ORDBDLL-1016): File not found

At first i was able to just click through the errors and it would end up working, it was annyoing but i could make my canges and additions and all was OK, but just today it has now got worse where it closes the library when it gets the error.  So now i cant get my work done.  None of the other engineers here are expereincing this issue on their machines.  

Any Ideas?  What database is it referinging to, the olb file is local to my machine is it calling that library a database?

 Thanks

Using Parameters in Pspice models

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Is this possible? As an example I set R1VAL to 10 using a parameter block. Then I edit the model of an Rbreak resistor and type

.model Rbreak RES R={2*5} dev=1%

I set the value of the resistor to  {R1val*10} and it behaves like 1k 1% resistor. No problems up to here. 

The problems starts when I try to use the R1val parameter in the dev statement. My goal is to be able to set up parameters that can be changed which would in turn effect the dev values for the resistors. This is to be able to quickly simulate different mission enviroments with different amounts of radiation and temperature.

So here is what I try, I type dev={R1val*2} and then run worst case analysis and the resistor does not behave like a %20 resistor. Even when I take the "math" away and just use dev={R1val}, it does not look like a %10 resistor. One of the worst case lines actually go down below zero and show negative voltage at a node that needs to be somewhere around 5V.

On top of all this, if I use too small of a value for R1val such as 1 or 2 and then use dev={R1val}, simulation gets aborted due to " can't divide by zero" error.

I have no idea what is going on, can some one help?

 

Andy.   

Tools for viewing DSN file and allegro netlist.zip

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Hello,

We were given some old hardware design files by a customer for redevelopment. The files came in the form of .dsn and zipped files. I tried the Allegro Free Physical/MCM Viewer and got the following errors:

Error (SPMHDB-238): the database is corrupted. - with the .dsn files

Error (SPMHDB-180): database revision 1024.x is newer than current program version. - with the allegro netlist.zip or gerbers.zip files.

Suspecting these could be OrCad Capture files, I then tried the free OrCad ViewReader which turned out to be a translater rather than a viewer. The latest attempt was to download an OrCad 16.6 Demo Software and see if that's any good but apparently it takes time.

 While I'm waiting for the download to finish, could anyone shed some light on this issue? What tools is it likely to be that I needed for viewing these design files?

 Many thanks 

 

 

Gnd refrence layer

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Hi all

If a signal layer  has digital and analog signals and sandwiched b/w gnd planes, which gnd is reference plane for inr1? If inr1 has digital signals on right and analog signals on left whereas inr2 has reverse,analog signals on right and digital on left.GND1 has split plane (analog/digital) as per INR1 and GND 2 has split plane as per inr2.

 

GND1

INR1

GND2

INR2

or we should have same cut out present in GND1 and GND2 to provide refrence gnd to INR1 layer?

Thanks

Nayyier 

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