Is there a SKILL code which will enable me to move parts in Allegro, by grid
values, using arrow keys? I want to select the part and then hit the shift-left
arrow key to move the part one grid point left. Pressing shift-left twice will
move the part two grid points. It will be just like moving the part in the
direction I want but with more control.
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How to move parts by grid values using arrow keys?
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Create an assembly drawing - revised to create fab notes 11-9-11
Hello everyone,
I am attempting to learn how to create assembly drawings from within pcb editor. I have searched the forums here and looked through the cadence software documents; however, I cannot find any information on how to create an assembly drawing. When I click on the assembly drawing command in pcb editor, I get an error stating variants.lst not found. Can someone explain how I can create an assembly drawing or please point me to some literature that will explain. Please keep in mind that I have no idea where to even start with this process, so please be as thorough as possible.
Thank you,![]()
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IBIS models
Hi All,
I am having a hard time simulating IBIS models version 2 and 3 using PSPICE. I was told that PSPICE 16.6 would support these versions. Anyone would confirm that so I may ask my school to upgrade the SPICE version from 16.5 to 16.6.
Thanks
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Add connection to the point PC does not show the route
Hi
When I start add connection PC hangs does not show started connection even though it is there and if I do zoom in and zoom out then it shows it. What should be the reason ?I am using Allegro 16.3 - L.
Thanks in advance
Saira
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TI494 part and transformer modeling
My group and I are trying to build a transformized h-bridge dc-dc converter. I was hoping to model this on spice, but have had no luck so far. First I am trying to use an ideal transformer but do not see how you enter the turns ratio to make it step up at the right ratio. Also I was hoping to try to simulate the PWM using the ti494 pwm chip. I know that this chip is still produced by TI, but cannot seem to find the model in Pspice. I am using Orcad Capture CIS. Can this be found in one of the libraries on p-spice. If so what is it called. If this part is not able to be used on this software is there any other parts that would work for my h-bridge simulation. Thanks in advance for any help. Don't know if this is needed but the mosfets on the primary side are MbreakN and all the diodes used are D1N3940.
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Creating a microvia with Pad_Designer 16.5
Hi everyone,
I have a .4mm pitch BGA that will be included on my next design, so I'd like to get set up to use microvias. I thought I could edit the dimensions of an existing thru via to make it a microvia in Pad Designer, but under Parameters/Usage options in Pad Designer, the Microvia option is greyed out.
Am I trying to do this the wrong/hard way? For what it's worth, I'd like to make a 10mil pad with a 4 mil drill for my microvia.
Maybe a better way to ask the question: How do I make a microvia padstack in PCB Designer 16.5?
Thanks in advance for any help. Best Regards.
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anyone successfuly installed OrCAD Capture CIS 16.6 with CIP?
Our CIP schematic symbols are not showing up. Just the ones in the supplied library. Everything works fine in 16.3 but we are trying to get the upgrade done.
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Reg: How to do slot dimension using NC route option
Dear All,
Please let me know how to do Board slot dimenstion using NC route option.
Now normaly, we do like, mark the slot in fab layer with dimension.
So please guide me to use NC route option.
Thanks and Best Regards,
R. Balasubramania raju
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Uprev Old .tech file
I am attempting to uprev an old .tech format file to import into SPB16.5 without success.
Has anyone been able to import the Cadence supplied tech_sample.tech into a .brd file in SPB16.5?
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photoplot outline for complicated, imported board outline shape?
Hi everyone,
I'm going through the process of generating manufacturing files. Step 1 appears to be to add a photoplot outline. To create the outline, I relied on someone using a mechanical CAD tool to generate my board outline - I imported that outline as a .dxf file and assigned it to the Board Geometry -> Outline layer.
I'm trying to re-import the same .dxf file now and assign it to the Manufacturing -> Photoplot_Outline layer. I get a message saying that the import was successful, but I can not see the photoplot outline. I've tried moving the cursor over the outline, deleting the board outline, but it just doesn't appear to be there.
How do you guys handle the board outline photoplot for complicated board outlines? I'm assuming that it is necessary for the shape of the photoplot to match the shape of my board outline exactly - is that correct?
Any help is appreciated.
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Allegro dxf export. How to export height information?
I have seen a post stating that it's possible to export package height information with a dxf, but it doesn't appear to be working for me. I do have CDN_TYPE, SYMBOL_TYPE and REFDES but no other properties.
Thanks
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Positive/Negative plot mode
Hello,
I have finished (I think) my first board and I'm ready to send files to a board house for a quote. Could someone explain how I should select whether to use positive or negative plot mode? It's not clear to me when it might be appropriate to use one vs. the other, but I could imagine that selecting the wrong one could make my board turn out very, very wrong.
I'm not really sure what relevant information is needed in the selection process. As background, I used a ground fill (copper pour assigned to GND) on all layers and this is a 4 layer board.
Also, I have already generated a soldermask bottom, soldermask top, and silkscreen top folder in the Artwork Control Form -> Film control. In addition to those things I have etch, pin, and via information for each of the layers in the film control tab. I'm using PCB Designer 16.5.
Thanks!
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gate drive for h-bridge in cadence cis
I am looking for a gate drive to drive four mosfets in an h-bridge configuration. I have looked in the libraries that are provided at by my school and do not see any. Is there a library for just gate drives or will I have to download them from the company. I am hoping to use a texas instrument gate drive.![]()
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how to simulate time varying capacitance in Orcad ?
Hi
I have a circuit which has piece-wise time varying period capacitance- how to simulate this type of circuit in OrCAD?
Thank You
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Route Keepout Questions
1. When I use Route Keepouts, I get DRC errors when there is a via within this Route Keepout. The actual DRC is "Thru Via to Route Keepout Spacing". Pretty much all of the time, I don't mind that there is a via in the Route Keepout, as long as there is no route connected to it. For instance, if I have a keepout on a layer beneath traces for impedance control and the traces in question happen to via. If I cared about vias in that area, I would add a Via Keepout too. Is there a way to supress this DRC without waiving it for each design? I don't want to use voids in the pours as those are prone to disappearing if one needs to delete a pour and recreate it for any reason.
2. I use Route Keepouts to keep pours from flooding areas in which I don't want copper and not necessarily always for true route keepout. For instance, while routing Ethernet between the transformer and the RJ45 connector, I use a Route Keepout - All to remove all pours below these routes. However, sometimes, it is necessary to route other traces from the RJ45 or through this keepout area. For this application, I am really using the Route Keepout as a Pour Keepout and not the traditional "keep all routes out". This creates many DRC errors for the routes that need to go through these areas. Is there a way to supress these DRC errors withouth waiving them for each design, or perhaps, better yet, a better way to do this? Again, I don't want to use voids in the pours as those are prone to disappearing if one needs to delete a pour and recreate it for any reason. I wish they had something like a Pour Keepout. That would be nice.
Thanks.
--Mark
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changing the line end' shape
Hello every one
how can i change the shape of the line from pending curve to straight shape in order to dealing with smd chips in orcad layout 10.3
from this shape --------) to this shape --------|
Best regards
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How to add a free via in PCB Editor?
Hi all,
Not been using PCB Editor too long and I'm trying to add some free vias to a top and bottom area fill but can't work out how to add a via without any tracks going to it (what used to be a 'free' via in Orcad Layout).
Anyone able to give me a pointer?
Thanks
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Turning Off Net Names 16.6
Does anyone know if you can turn off the net names displayed in 16.6 ?![]()
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gerber 6x00 error message
Hi All,
i have another question. Using gerber 6x00 settings in V15.7, I am trying to output gerber. But one of my inner layer (negative film) has error. Please see attached image. I think the thermal pin of the hole is the error (because it portrudes outside the copper pour???). How can I remove the error in gerber without changing the thermal flash?
Thank you,
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Embedded Component
Hi All,
I am using Allegro 16.5 xl. license.
I need to place few components on internal layers. how should i use the embedded componenet placement .
Also, pls let me know how can it be done in PCB itself (without schematics changes)
thanks
Bala R
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