ERROR(ORPSIM-16364): Invalid device in subcircuit
Hello,while simulation in pspice m getting the error-**** FROM LIBRARY "D:/dc workspace/downloads/orcad library/switchana.lib" ****.SUBCKT 2TO4 A B INH Y0 Y1 Y2 Y3 VDD VGND PARAMS: vdd1={5} speed1={1}...
View ArticleHow to convert a circuit into a single ic/part in orcad pspice
Hello,I have designed a circuit and simulated in pspice,now i want to convert the circuit into a single part/ic so that i can use that part in other projects directly instead of building big ckt and...
View ArticleDocumentation for Capture Tcl/Tk Extensions
Is there any other documentation than "OrCAD_Capture_TclTk_Extensions.pdf" for the commands in OrCAD Capture?A list of command doesn't help if you don't know what the command exactly do.
View ArticleUnable to execute Skill file
Hi,I am using 17.2 version(hotfix 11), I am unable to execute skill files in OrCAD PCB Editor it says, E- *Error* toplevel: undefined variable - check_silkThanks in advance.Vinay
View ArticleERROR(ORNET-1113): Bad PSpice net name on part U5
Hello,while simulation in pspice-the error appears-INFO(ORCAP-2191): Creating PSpice NetlistINFO(ORNET-1041): Writing PSpice Flat Netlist D:\dc workspace\orcad\sasa mix...
View ArticleSet default grid settings in Orcad PCB Editor
Hi,Is there a way to set the default grid setttings and other Design Parameters?Because of now every time I create a new symbol I have to go to Setup->Design Parameters and then set the grid...
View Articlepspice error-less then 2 connection at node
Hello,while simulation in pspice i m getting these error,what is the reason for these errors.ERROR(ORPSIM-15141): Less than 2 connections at node 6_GND_D.ERROR(ORPSIM-15141): Less than 2 connections at...
View ArticlePspice error-Node is floating
Hello,while simulation in pspice m getting these error,what can be the for these error??ERROR(ORPSIM-15142): Node 2_V_SAFE is floatingERROR(ORPSIM-15142): Node 2_V_POS is floatingERROR(ORPSIM-15142):...
View ArticleMinimum Blind/Buried Via Gap (L1-L2 and L11-L12)
I have a design with one buried via L2-L11 and two micro vias (L1-L2 and L11-L12). I do not want my microvias overlapping the buried via, but I don't care if the top and bottom micro-vias overlap for...
View ArticleOrCAD simulation - Propagation delay of CMOS inverter
I need to get the characteristics of dynamic parameters of CMOS inverter (tplh,tphl,tp) and measure them from the graph.Inverter is induced by square pulse generator with frequency 200kHz and fill...
View Articleunexpected dialogue box appear while simulation in pspice.
Hello,why this dialogue box is appearing while simulation.before some time everything was ok,i was able to see the black window where marker probe signal is displayingRegardsDC
View ArticleEagle to Allegro Conversion
I am having ns_eagle2allegro configured and trying to convert a .brd file to Orcad readable .brd file.I am receiving an error as ' Translation stopped! Data must be in XML Format! ' in the log.Please...
View Articlepspice error-undefined float property
Hello,I am facing below error while simulation in psice,INFO(ORCAP-2191): Creating PSpice NetlistINFO(ORNET-1041): Writing PSpice Flat Netlist d:\dc workspace\sasa project simulation\try2\orcad design...
View Articleerror in pspice simulation
Hello,someone help me to resolve the error.--------------- INFO(ORPROBE-3209): Simulation Profile: 0-BlockDiagram-sasa simulation try 2 ---------------INFO(ORPROBE-3183): Simulation running...**...
View ArticleGetting started
I've been looking and can't find a "Getting Started" guide. Particularly, I'm looking for how I can set up, edit a use footprint libraries. I was able to find the library tool for Capture, but not for...
View ArticleAllegro Design Entry-DRC-Check Power Ground Mismatch Query
Hi,Please find below my query regarding DRC check in the Allegro Design Entry CIS 16.6, Please help to clarify,Example#1:If power pin (Eg. GND1) connected to different GND net (Eg. AGND) then I'm...
View ArticleBreaking up large pin count connectors
Hello,I am looking for a better way yo place large pin count connectors in capture. Presently I have always make a multi package part with the pins grouped in some way. This works OK, but sometimes...
View Articlesearching FOR LIBRARY PARTS IN MULTIPLE SUBDIRECTORIES.
I create my footprints in PCB Libraries footprint editor. I creates a subdirectory for each of my footprints. I have to copy the .DRA .PSM .TXT and .pad files from the subdirectories to the main...
View ArticleTcl script, for library manipulation
Hi all,I am trying to use CapLibPropUtil.tcl script in the tools/capture/tcl folder. But the parameters are vague. In the add property command the parameter "Olb path" is ok. But what is the "log file...
View Article17.2 alias key problems
In Version 17.2 my alias keys do not work until is use the middle mouse button to scroll. Once I move the mouse then my page-up and page-dwm keys zoom in and out. Is there a fix for this ?
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