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Allegro white screen.
Today I installed latest patch #85 and what I can see this problem with white screen is fixed.I can now work with my window maximized.Br Johan
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Change multiple off-page connectors names & directions
Hi Forum ,I have a set of off-page connectors as follow I want to change the names and directions from a spreadsheet (Similar to export/import properties) . If I Ctrl+E the off-pages connectors I get...
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step package mapping
I want to add step packages to parts in the library so I don't have to map these each time.If I do from the library, is there a shortcut to see them placed on a PCB, so I can verify the XYZ?
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Guidance in finding the Replace/Change Via Mode Functionality
I've stumbled into a rather dense board layout with several painfully placed via fanouts in place. I now need to replace the vias with slightly smaller padstacks due to density and spacing issues.I can...
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How to copy an unfilled shape's border into a line draw?
With 17.2's creation of an unfilled shape on Board Geometry/Design_Outline subclass when loading a .emn file we have lost the line draw that was being created with the older versions of Allegro. I...
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Connectivity of SMD Pad With Drill Array
Just another obscure challenge that I haven't faced before. I want to create an SMD symbol with a funny shaped pad and an array of drill/vias for thermal connectivity to inner layers. Also want the...
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Abrupt closing of Allegro PCB Designer software
Hello everyone,I am using Cadence Allegro PCB Designer 17.2 for designing a PCB board. The software worked well for many days as I progressed till the last part of my design.Recently, when I was...
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ORCAD DATABASE cONFIGURATION File Setup
HiI am trying to setup my database(.mdb) file using the Configuratiuon Wizard in OrCAD CIS 16.6 aFTER completing the Setup wizard the CIS Explorer is showing the Data Source Name and Parts are...
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Corners of dynamic shape keepouts
This is how the tool has always worked for me, but the question was proposed to me and I’m not sure how to react. When generating dynamic shapes around square padstacks (we typically will use a square...
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Library Management, collaboration of symbols and footprints
Hi Cadence Experts.I been using Cadence PCB Editor for years for board layout but with recent development, i need to cater footprint and symbol creation, schematic entry as well.I do not know where...
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Orcad PCB 17.2 Decimal Separator Issue
Hi All,It seems that the script files for creating padstacks is broken in Orcad PCB 17.2.Until OrCAD 17.2 S008 all worked fine.But from OrCAD 17.2 S009 this is broken.It seems that the script files...
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error while simulation in pspice
hello,I am new to ORCAD and Pspice simulation.I am trying simulate a mux ic.but while simulation I am getting following errors-ERROR(ORPSIM-15113): Model Sw used by X_U1.S0 is...
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Netgroup issues
Capture has decided to delete many of the ports I have for some reason:Recreating all the lost netgroups is extremely time consuming and this is an issue I have encountered a few times now. I want to...
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Placement Interference DRC with Embedded Components
Since the cavity for an embedded component is based on the Placebound shape in the package file (according to the Embedded Component Design Best Practices document), and Package Keepout areas are not...
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Simple Part Creation Process - advice requested
I'm new to Cadence and working through a part creation process for a common library accessed by multiple users.I see a blog question earlier on something similar but I'm just wanting to see if I'm...
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Allegro 16.6 "Marked Fanouts" disappear after eco process
All, I have capacitors, resistors fanned out and tied to symbol (MARKED) for ease of Move/Routing.I need to change parts with same footprint. After I import Logic, the "Marked" fanouts go away.I can...
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Page numbering
I am having problems with page numbers (and total number of pages) that appear in the title blocks. Although they are sometimes correct, most of the time they are wrong. I know how I can fix them...
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Incorrect number of interface nodes for X_U1.
Hello,**** 02/14/17 18:00:57 ****** PSpice 17.2.0 (March 2016) ****** ID# 0 ******** ** Profile: "SCHEMATIC1-74LV4052 NEW" [ D:\dc workspace\orcad\74lv4052 new-pspicefiles\schematic1\74lv4052 new.sim ]...
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ERROR(ORPSIM-15108): Subcircuit 1000E-10 used by X_U1.XU1 is undefined
Hello,I am using below written model for simulation but its giving the error-ERROR(ORPSIM-15108): Subcircuit 1000E-10 used by X_U1.XU1 is undefined.Subckt 4052a A B INH yio0 yio1 yio2 yio3 ycom xio0...
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Embedded Geometry Subclasses
I'm going to ask a stupid question: can someone explain the purpose of the six subclasses (Assembly, Cavity_Outline, Display, Pastemask, Place_Bound, Soldermask) for embedded components (Embedded...
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