Clik here to view.
Reduce blank page borders in exported PDF from OrCAD Capture
In OrCAD Capture, when I export a schematic to PDF, there is a fairly large blank border outside the "Grid Reference," as if the PDF itself needed borders like a printer that can't "bleed" to the page...
View ArticleClik here to view.
"Attribute "CDS_DI_CONTROL_MASK" is not defined." Allegro HDL crashes
This require a little explanation.At work we have floating licenses for Allegro HDL, recently upgraded to 17.2.I generally work on projects from my Windows 7 pc but a colleague uses various Linux...
View ArticleClik here to view.
Feature Request: New 3D Engine PCB 17.2
Hello,this is my first post to this Forum. hopefully it is okay?I use the new new 3D Engine with the Cutting function and it is very importend to add any mirror function for the cutting.as Sample if...
View ArticleClik here to view.
PCB 17.2 Step Mapping troubles
Hi i have some Troubles to map some 3D Step files.Here a view Samples.community.cadence.com/.../Step.zipRegardsPeter
View ArticleClik here to view.
How to add Mechanical Symbol to Drill Chart?
I have a mechanical symbol for a #4 hole non plated mounting hole.After I'm done routing I added them by going to Place > Mechanical Symbol as needed and created the drill chart table. However, I...
View ArticleClik here to view.
Drill_Fab Artwork \ Gerber is Blank
Hi AllI'm generating the artfile \ Gerber for a single layer board. When I import the created art file to Allegro, All the gerber films are displaying correct except the drill art work which is blank...
View ArticleClik here to view.
How to remove unused parts from an Allegro 16.6 PCB file
I have an Allegro PCB Editor file that has a mechanical part that was added but then not used.But the IPC output refuses to complete because this unused part still exists in the PCB editor file...
View ArticleClik here to view.
Running a basis script in Allegro Design Entry HDL causes schematics error
Hello Cadence Community!I am extensively using automation-generated scripting (*.scr) to automate schematic generation and updating in Allegro Design Entry HDL.Everything is working well for me, except...
View ArticleClik here to view.
Reuse of Allegro PCB board file with new schematic in Design Entry
Hello,I have a question if this is possible: I have an Allegro board file and want to change a few things in the schematic. But I don't have the project or schematic files. Is it possible to create a...
View ArticleClik here to view.
Edit .dra to add new pin with netlist name
Hello,I have two .dra files with custom ICs with some pins. Now I am trying to edit this files in Package Designer to move some pins and connected netlist names from one .dra file to the other. After...
View ArticleClik here to view.
Grid spacing in schematic part editor
Hi, I am trying to create a part in OrCAD Capture 17.2, i want to change the grid spacing of the schematic part editor page. I tried to change the grid spacing in...
View ArticleClik here to view.
Connecting component body to ground on smd board
So, i'm rather new to OrCAD & SMD designs, have made a footprint w padstacks for a voltage regulator according to suggestions in data sheet, but not quite sure how i should go about connecting body...
View ArticleClik here to view.
When I enable "unused pads suppression" Error Report: Not all hole DRC....
Hi sir,I enable "unused pads supporesion" in inner layers and select "dynamic unused pads suppression".But there is a error report as below picture.I check the Constraint rules about HOLE in...
View ArticleClik here to view.
Location of "edit via" list from constraint manager
So, i've got a layout where i want to switch vias globally. Through right click via - modify design padstack - all instances i'm getting a warning "W- WARNING: If this is a via padstack, it must be...
View ArticleClik here to view.
Illegal Character and Duplicate Pin Name
Hello. i am new to this whole design process and Cadence. i have came across following errors while i was creating Netlist. INI File...
View ArticleClik here to view.
3D Canvas Flex Bends
Hi,I watched this video so I know it is possible to bend areas of the PCB in the 3D canvas viewer.https://www.youtube.com/watch?v=trmPd_7_8yQWhen I right click on the canvas or flex area there is only...
View ArticleClik here to view.
Component RefDes / page number problem - Allegro Design Entry HDL (17.2-2016)
Hi,In the schematic, I use the code below for Ref Des Pattern to assign refdes according to their corresponding page numbers.($PHYS_DES_PREFIX)($PHYS_PAGE)[0-9](01) or($PHYS_DES_PREFIX)($PAGE)[0-9](01)...
View ArticleClik here to view.
Adding Multiple values to single field in CIS database
Hi,I'm Using excel as my part database. I have to add two manufacturer part numbers in a single field named "MFGP/N". So When I try to place the symbol, I can choose which part number need to give like...
View ArticleClik here to view.
How to put via in the center of BGA pins
Hi sir,How to put VIA in the center of BGA pins in below case. You can see Distance a is smaller than b. When i set Route/create fanout/ pin via space-centered, it put the via as picture shows.It seems...
View ArticleClik here to view.
How to Auto Insert Board details like a PCB number etc into a design
Is it possible to add links in an Allegro design that automatically link to the variables in a projects atdm.ini file so that board numbers/artwork numbers and revisions are automatically kept...
View Article