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New to Pspice
Hey guys, Im an engineering student and i am using Spice to model a single solar cell, but i am having some problems with it, i was wondering if someone can help me make this work, my problem is that...
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Avago HPCL-3120
Hi, I need to convert Avago HPCL-3120 to Capture and Pspice. Not usually a big problem but this time it not as usual.* HCPL-3120 SPICE Macromodel * (also applies to HCPL-J312)* Rev. A* 09/07* ZFC **...
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Using LAPLACE model in PSPICE
Hi,I was trying to replace a Resistance (345 ohm) and inductance(2.6mH) in series in my circuit with a Laplace model available in Pspice ABM Library. Since the Laplace for a RL circuit is R+Ls , I...
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Loading skill files
hi....Is there a way to load skill files without using skill loader?Thanks!
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Layering Keepouts
Good morning all, I have a switch on a pcb which has a button cap placed on it. I created a round keepout to avoid placing components around the switch which will hit the button cap. I draw the...
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PADSTACK DEFINE KEEPOUT
hi,I need to define route keepout for a padstack like fıducial.pad how can i manage that ?thanks in advance
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Problem with 1 pin symbols loading?
I'm doing a design in Design Entry HDL and importing into Allegro PCB Design L. (Versions 16.5). All of the multipinned parts import and place without issues. But I have some 1 pin parts, grounded...
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Stability analysis of an ECU by using PSPICE
Hi,I am doing the stability analysis (need to look at the amplitude response, phase response and phase delay) of an electronic circuit which will drive a DC motor (ofcourse its a closed loop system)....
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Manual entry of components
Is there any way of manually adding a component to an Allegro PCB design using PCB Design XL in the same way that you could in OrCad Layout.I have been able to copy a footprint but the component is...
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New 16.5 user
Hi all, I am new to PCB Editor 16.5 coming from Orcad Layout 15.7. I have been using Orcad products to do pcb layouts since it first came out back in the 80's. I would consider myself an expert user...
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Can I just rename the refdes of the parts with the same property which I...
Hi,Are there any ways to rename the refdes of the parts with the same property(ie."connector=dual") which I specified during package the schematic? And do not change the refdes of the other parts...
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Orcad 16.6 panning
In previous version of Orcad, panning a schematic was very simple. Zoom also had intuitive results.Why I pan, I would use the C key and just move the mouse to pan. When zooming, I could use the I key...
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Generating gerbers
Hi Guys im getting a few warnings in the log file when generating gerbers.WARNING: more than one via class in film record WARNING: Null REGULAR-PAD specified for padstack VIA188 at (-576.17...
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Ratsnest minimization length
HiI am anew user oforcadpcbandwould like to knowifit is possible tominimizethe length of theratsnestduringthe placementof a component andnot after it isplaced.Thanks
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Silk Screen Visibility OrCAD PCB Designer 16.6
I've opened up an existing brd file that I generated using OrCAD PCB Designer Professional v16.5. It appears that all of my parameters remained intact, however, the colors, transparency and brightness...
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Snap To Grid - No Way!
OK - The "Snap To Grid" option simply doesn't work (for what I need) under 16.6 SP5. I obviously expect too much, but after several hours of clicking and reading the help docs, I can only conclude its...
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Orcad 16.6 capture ERROR(ORCAP-5004): Error initializing COM property pages:...
Hi, allMy OS is windows 7, 32bits. SPB version is 16.6.When I trying to create Netlist, this error happed.I have searched in this forum, try to debug with the method in this...
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design tools
what is the difference between port and off-page connector in orcad? please repli 4 my ques...
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Hlp with pcb design
Hello,I am a student and i am having problems with understanding a certain pcb design. You can find the pcb here: http://pdf1.alldatasheet.com/datasheet-pdf/view/449682/TI1/LMR62014.htmlWhat i don't...
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Define via structure
Hi all, there is just explanation from Cadence Help about how can we use define via structure to duplicate via and cline we use frequently to do BGA fanout but there is no instruction on how...
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