Difference between OrCAD EE Designer V16.6 and EE Designer Plus V16.6
Hi,I was trying to purchase the professional version Pspice. Basically my present requirement is to perform some sort of stability analysis on a circuit which is not very complicated. Also need to do...
View ArticleDangling lines problem
Hi AllIs there any way to delete all dangling lines @ one shot ... RegardsPrashanth
View ArticleOrcad 9.2: Post Process Spreadsheet does not show any layers (outputs) ?
Hello,In a recent PCB design using Orcad 9.2, when I open the Post Process Spreadsheet, no Layers (outputs) are visible, only the column headings are present.Please see attached screenshot.I compared...
View ArticleCost of Pspice A/D with Advanced Analysis
Hi Does anyone know about the cost of Pspice A/D Licence with Advanced analysis option?If Im not opting for the Advance Analysis option how much it will be?Thanks for any info,regardsMadhuraj
View ArticleHow to make propety CDS_PHYS_NET_NAME invisible design entry HDL
Hi ,In my hierarchical design, the higher level net names are shoing up on the individual blocks as CDS_PHYS_NET_NAME property after packaging. How can I make it invisible. I tried using...
View ArticleVertices or shape
Hello - What is best practice for the board outline, creating it as a shape or set of vertices?
View Articleproblems managing models with subcircuits and duplicate named parts
Hello, I am new at this, and trying to set up libraries with models.I am currently working with two mosfet models downloaded fromSTmicro...both are subcircuit models with additional simple components...
View ArticleBOM_IGNORE IN CAPTURE CIS-163
hi,Is their an option where in i can generate a BOM while ignoring a component in the Schematic using Capture_CIS-163 something like wht it is in HDL
View ArticleNet Capacitance Constraint in the Constraint Manager
Hi,I'm trying to check all nets in my design for the capacitance, just like Display->Parasitics show the capacitance to shield layer. With the "extracta" command I can do that for my whole design...
View ArticleHow is Net Resistance calculated?
I am curious how Allegro Physcal Viewer calculates a net's resistance. I can create a report which contains NET_RESISTANCE from the NET database. How is the value returned calculated? If the net is...
View ArticleAllegro Free Physical Viewer 16.6 Will Not Run
I am bringing this to the community because I have not been able to get this resolved through Cadence support so here goes...Back in early February, several product engineers running Windows 7 on Dell...
View ArticleViewing pcb footprint in schematic capture
HiThis was working sometime back.We have had several updates and hotfixes and something now is not allowing me to view the footprints.Anybody else having this issue and if you did, how did you fix...
View Articlefootprint script fail
I have a problem when I want to import a footprint through Ultralibrarian software. Ultralibrarian exports a library including a script file to run at Allegro PCB software. The problem is that I run...
View ArticleLoading skill files
hi....Is there a way to load skill files without using skill loader?Thanks!
View ArticleSPECCTRA quit unexpectedly with an exit code of 3
Hello all, I am new to PCB design and using examples from Complete PCB design using OrCAD Capture and PCB editor book and when I try autorouter I am getting SPECCTRA quit unexpectedly with an exit code...
View ArticleArtwork Generation
Okay how do the pros set this up quickly? I find for each board it is a very tedious and painful process to get the correct folders set up and the classes and subclasses to get the silkscreen and...
View ArticleText not showing up in Gerbers after artwork generation
If I see text when I set up my artwork why isn't it showing up in the Gerber layers?This is labels inside of planes on the supplied default available film layers that are etch. The void in the plane is...
View Articlehow can I define the ESR value to an inductor?
I placed a common inductor into the schematic. But I couldn't find the resistance attribute in the part property. For a comparison, by the LT-Spice, you can always edit the resistance value of an...
View ArticleUsing custom footprint ... not messing with the instalation
Hi.I have the following custom footprint with files:fp1.psm; fp1.dra; r411_367.padIf I put these fles (I tested) in C:\Cadence\SPB_16.3\share\pcb\pcb_lib\symbolsfootprint the footprint will be shown in...
View Articleunknown problem during pcb generation
Hello, I encoutered a problem while netlisting and updating pcb desing.I have a 16.6 capture desing with its pcb. Now I need to update few things in it, so I copied the desing to another folder, add...
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