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PCB Designer paths not set
For a typical installation of OrCAD PCB Designer, what would the paths be for devpath, interfacepath, miscpath, modulepath, padpath, parampath, psmpath, techpath, topology_template_path? My current...
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Changes not saved, cannot update the env file (check permissions of file and...
I get the error in the Subject line when I try to change my paths; I have tried running the program as administrator. Is there another way to do this? Thanks,-Travis
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Voids
I cannot delete a void in my 16.5 design and it is preventing me from changing a shape. I have tried deleting the shape and importing a new one from a dxf file and still no good.Any suggestions?
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PSpice dummy model
Hi, Capture shows green circles next to each connector or test point (single pin connector) because there is no PSpice model for that. It's fare, PSpice runs anyway. Now, the diagram looks like a fied...
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How to make layout from schematic......??
Hi, I am using orcad 9.2 version, i need your help for making layout for PCB with gerber file.so far schematic is created in capture, the netlist is created showing lots of error with taht schematic....
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SCHOTTKY DIODE
Hello,I am using a circuit which runs at 105khz - 250khz in sweep analysis, i want my ac voltage to be converted to dc via a bridge rectifier. as normal diodes don't work well at these frequencies i...
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How to assign/update an etch objects' net
Unaware I was in the wrong forum, I've been posting this PCB layout question in the Digital Implementation forumhttp://www.cadence.com/Community/forums/p/23378/1322026.aspx#1322026 I am trying to take...
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Ratsnest minimization length
HiI am anew user oforcadpcbandwould like to knowifit is possible tominimizethe length of theratsnestduringthe placementof a component andnot after it isplaced.Thanks
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Re: How to assign VIA to a net name?
Thanks for the tips Kari, but I am still missing something Can you tell me how to interpret the lingo such as what you wrote "editSelectVia -nets oldNet"Does this mean to type a command in the command...
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Problems with parametric analysis in pspice
Hi,I was trying to do a parametric analysis with AC Sweep. I was sweeping a particular resistance value from 400 ohms to 1100 ohms in steps. Actually the bode plot (DB and phase) at some particular...
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How to make a trace with soldermask on top, Allegro PCB Editor 16.6
How can this be done? I skimmed through manual, couldnt find it yet, also played with options in RF-Edit subsection, there are different nice features, but I dont see how can I lay down that type of...
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How to delete polygon in Allegro 16.6 PCB Editor
Sounds simple, but it just does not work. Maybe some switch has to be turned on for that or anything else? It is amazingly non-intuitive! There is some polygon on TOP layer for the Etch class. I...
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Updating symbols in16.6 - padstack refresh info message
I've been updating a few library symbols originally done under 16.3. When doing a "refresh padstacks" in the symbol editor, I get the following log file entry: INFO: Design is an old-style flash...
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How do I attach a picture to a post ?
Hey guys, how do I attach a picture to a post without an external URL. I seem to recall there was a post on this some time ago but cant seem to find it on the board.Thanks Scott
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Attaching component pads to some trace
for example I have some RF Connect (or maybe even regular trace if you wish) which connects pads of two elements.Now I want pad of third element to be added to same connection net, But i do not want...
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Routing Traces at the same time.
I am trying to route multiple pins at the same time but having difficulty.In pic R1 I routed the traces one at a time and this looks ok.But in pics r2,r3 I tried to route all the pins in one go similar...
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Reg:Moving parts taking more time any solution ?
hi, I am editing dence board in which few parts added , When I pick each part to place its taking more time to complete & for next pick I think its running database check in the background ....
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How to assign/update an etch objects' net
Unaware I was in the wrong forum, I've been posting this PCB layout question in the Digital Implementation forumhttp://www.cadence.com/Community/forums/p/23378/1322026.aspx#1322026 I am trying to take...
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How to make layout from schematic......??
Hi, I am using orcad 9.2 version, i need your help for making layout for PCB with gerber file.so far schematic is created in capture, the netlist is created showing lots of error with taht schematic....
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MIL-STD-1553 trace routing
A lot of boards I have done over the years have used MIL-STD-1553 communications. Normally these were boards where the coupling transformers were located close to the connector. The manufacturer of the...
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