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Auto-Interactive delay tune, not working in Allegro 16.6 007
Hello, I am attaching a picture snapshot of constraints I created for two pinpairs. One pinpair is longer than another, I want Auto-interactive delay tune to make shorter pinpair (DIN2) has the same...
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Orcad Capture, automatically write probe data to file
Hi,I'm trying to automate the process of writing some transient simulation data to a text file of my choice.A simple example would be exporting the voltage at 2 separate nodes in the circuit to 2 files...
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Step Model Import with Allegro 16.6.60.008
Hello, I have got the step model import function working and was wondering if others found it difficult to ensure absolute alignment to the pads? When mapping the footprint to the model the step...
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Capture Canvas Image - Allegro 16.5 and 16.6 not working
Just moved from a windows XP OS machine to a windows 7 OS machine.Using Allegro 16.5 and Allegro 16.6 The images I get from Capture Canvas Image, are blank. I have run the tools as a user and as an...
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Create artwork error
Hi, expertsI found there was a post named "Create Artwork Error" posted last year, while there is some differences in my case.My OS is windows7 32bits, Allegro PCB Design XL (Legacy), 16.6...
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Generating footprint, want to import pin location list
I'm generating a footprint for a cylindrical connector that has 61 pins where each pin has a specific x/y location that is not on a grid. I see that there is a command under File>Import called "CSV...
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ERROR WHILE CONVERTING ORCAD TO ALLEGRO
Hi ,I got below errors and warning while converting orcad to allegro.,WARNING (Layout To Allegro PCB Design), Empty mechanical pins were discarded from footprint '16QSOPLL_6' WARNING (Layout To...
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Getting part on grid
I just loaded a netlist into a board where the default grid is set to 0.025". None of the parts came in on this 25 mil grid.What is the trick to getting them on grid? (I hope it is not manually as...
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Capture to Concept translator?
Does anyone have the Cap2Con translator they could give me? I've been made aware it's now only available through the "Services" department at Cadence. I need to translate all my legacy Capture...
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Ground Net suddenly turned to gray color
I dont know why suddenly all ground Pins of all chips/connectors turned Gray?In the color assignment for planes they have different color. why would that happen? Also, another question is, why do I...
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shielding in orcad pcb designer standard v16.6
hi, I have a RF line of 15mil width, i need to shield this line with a ground line and the spacing between the two should be 45mil. how to do this in orcad?
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Manual Interactive Routing in Orcad Pro is not easy.
Hi guys just a few questions, perhaps you can offer insight on how you are doing this.In etch edit mode when I route multiple traces at the same time is there any way to gather the traces so that the...
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Rel 16.6 - Property exclusion during back-annotation from Allegro to Concept
We are currently using rel 16.3 and getting ready to transition to rel 16.6. We use both Concept HDL and Allegro. However we create and maintain our constraints in Allegro only. Therefore Concept is...
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Issues about Capture Netlist Export
When I try to export a netlist in Capture, It failed with the below ERROR Information:#1 ERROR(ORCAP-36019): Unable to open file "C:\Users\马豆花\AppData\Local\Temp\tmp_pstxnet.dat" for writing. 3 T0 V'...
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Edit Net Properties line style by group
I have a bunch of nets that had there line style and line width manually changed, by right clicking each net and hitting edit net properties.I would like to now go in and change them all back to...
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RF PCB design with Capture flow-166
is anyone using a Capture(schematic) along with RF PCB option(Allegro PCB Designer+RF Option)? as the RF menu is enabled only DEHDL(to add RF elements), if we netlist the Capture design(where thr is no...
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Last used / missing reference report
I must be slower today, more so then usual.......... I have done / seen this before but today I am drawing a blank.How do I generate a report in Capture that shows the last used reference and any...
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Minimum PC requirements
Hi,i want to install cadence 16.6 on my PC but i need to know if my system requirements fair enough or not. so could you please advise about minimum system requirements for orcad 16.6. regards
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Place_Bound_Top vs Dfa_Bound_Top vs Package_Keepout_Top?
Can anyone please explain the difference between "Place_Bound_Top" "Dfa_Bound_Top" and "Package_Keepout_Top?" When using the built in package wizard, it seems to create an identical shape for the...
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RE. symbol properties
I am using CONCEPT HDL version 16.5. When i define the property 'has_fixed_size' in the symbol property, an error message is displayed suggesting that 'has_fixed_size' is a reserved property and cannot...
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