Changing Line Width Min/Max Defaults
I searched the archives to no avail. I would like to be able to set the default line widths in my design. I've tried editing them with Constraint Manager, but I'm not doing something right. Any...
View ArticlePart properties default template (Allegro Design Capture CIS)
Hi all,I am new to Cadence. For each time of creating new part, in Options/Part Properties/User Properties is missing some Properties that i have to add mannually such as : Manufacture, MFG P/N,...
View ArticlePCB Editor 16.6 Switching off snap-to-grid
As a newbie coming from version 16.2 to 16.6 how can I temporarily switch off 'snap to grid'; want to tweek some silkscreen text. Thanks
View ArticleTapered Trace function not working
Hi Guys,im using cadence allegro 16.5 version. and for some reason the tapered trace function wont work on a selected cline? i have attached an image with this of the issue and you can see why i wish...
View ArticleAllegro Placement Challenge
I am working on a project that consists of 2 boards placed one directly above the other very close together. They are so close that the component heights of parts on the bottom side of the board above...
View ArticleALTIUM converted file creates errors while importing
Hi,I designed board using orcad 16.3.That board file is convrted in to altium for customer review.Customer is caomplained that it creates error while importing due to fanout present in the board.After...
View ArticleA Little Help, Please - Soldermask and Via Questions...
I'm designing a board in OrCAD PCB Designer Professional 16.6 that requires two copper planes on either side of the board. The two planes must be connected by vias along the edge of the PCB every 3...
View ArticleGet the hierarchical design reference and display it in the page instance
In order to facilitate the design view/understanding (eg. when printed out), is it possible to get/display the hierachical design reference (typically A0, A1, A2 ... for an amplifier instancied...
View ArticleDownload layout libraries
Hello,I'm using Orcad Layout Engineer's Edition ver 16.0.0 to design my PCBs. Where I can find footprint libraries for the standart footprints?For example TQFP32, 0.8mm pitch, TQFP44, 0.5mm and 0.8mm...
View ArticleHow to design the 4 layer board in Layout?
Hi, I am interested on to put the 4 layers boards in layout.Since in the layout via definitions are there. Then how can i put my four layer board with Layout.How to put the vias in the ground and...
View Articlestepped bore for mechanical hole
Hi @all!I have a question regarding mechanical holes: How do I create "stepped holes"? (Hopefully this is the right expression!?)What I mean: I want to create a bore hole with different diameters from...
View Articlehow can i set the drawing order in pcb designer 16.5
Hi! First, sorry for my bad english. I am relatively new in orcad pcb designer, layout was a little easier. i made two pcb for the same project. It is a one piece project for testing, and i want to...
View ArticleRoom properties and IDF import poll
I'm a bit curious as to how other people do certain things. First of all......how many people require their logic engineers to assign room properties to every single component on an entire design? And,...
View ArticleCapture CIS Automation
I'm attempting to automate a lot of action in OrCAD Capture CIS (16.5) and am looking for guidance. I want to through the use of terminal switches and Tcl scripts do the following. If I have a DSN file...
View ArticleCan't generate netlist for pcb editor (allegro 16.0)
Hi! My company recently bought a license of PCB Designer that includes the Capture and the Allegro PCB Designer. My problem is that I'm trying to generate the 3 output files for the PCB Designer, in...
View Articleconcept HDL create discrete component
Hi, I need to create a new capacitor symbol in Part Developer and I want the symbol to be like a circuit symbol (two horizontal lines plates and two vertical lines terminals), usually I would just go...
View ArticleOrCAD netlisting error "Multiple pin 4's which have different nets connected...
I have a 4 gate part which has the power pins explicit on each gate that doesn't seem to want to netlist. I only have an actual net connected to one of the gates. This method seems to work with...
View ArticleCan I correct a misspelled component name while in Allegro Edtor?
I have a part I'm trying to place that is misspelled from the schematic. Do I have to go back to the schematic and fix it there, or can I change it in the layout, and eventually back-annotate the...
View ArticleUsing existing .brd for template.
I have a .brd file (Allegro 16.5) that I want to use as a template for a new board. I would like to remove all electrical components and netlist and leave behind mounting hole, etc. I would then like...
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