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Padstacks
HiUp to now all our designs have been 2 layer, with our interlayer padstack undefined for thru hole parts and vias.We are considering doing a 4 layer or perhaps a 6 layer design.Do I need to create a...
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Line to Shape Spacing DRC on Every Trace
Hello,I am just starting out with OrCAD 16.5 and I had a few questions.1. I have imported a design from Capture but in connecting the traces I have a "Line to Shape Spacing" DRC at pretty much every...
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Components placment, Collision, Clipping
Hello, can some body tell me where is settings for this behavior in place mode: components are attracted to each other when they are nearby.Alex
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LogoMaker - improved, and now multi-platform.
Please, please, please follow the instructions fully when installing. They are at the top of the Skill file and also here:Download and install the precompiled potrace release suitable for your...
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PCB thieving
What is PCB thieving and what is the relation between thieving and hatching
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Problem when converting .brd to HyperLynx !
Hello,Here is extract from HyperLynx manual:The Cadence Extracta ASCII-extraction utility must be fully installed on the computer to create the ASCII version of the design. It is not sufficient to copy...
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Convert layout library into allegro
Hi,it's the first i'm using allegro and i would like to know how can i convert the libraries i have from layout to allegro.Can i use them or must i design the footprints from the beginning in...
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How to design PCB Footprint for SMD Transistor
Hi friends, As i am very new to PCB designing using CADENCE Allegro, i would like to know how to design foot print for SMD Transistor which is shown here. As per my knowledge, i have created foot...
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Constraint Region Via Use
Hello, I am working on a design that shall use two different micro-vias. One shall have a 220um target land diameter for escaping dense .4mm pitch BGA's and the other shall have a standard 250um...
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3D_viewing problem
Hi All, 16.5 .S027 having a problem in the 3D view not showing the Z axis. Think it was working on earlier version, don't remember, but not working now. Open GL is enabled not sure where else to look....
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PHASE_TOLERENCE?
Hi all, why we have adjust the phase tolerence between D+ and D-?what is the difference between static and dynamic phase tolerence?Anyone please guide me., Regards,Karthik.
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Windows 7 64 bit database problem
Hi .I have Windows 7 64 bit , Office 2010 32 bit and Capture CIS 16.3 .Problem is that it is impossible to connect to Part database .Have you any solution ?
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Increasing the size of icons
Hi, I'm using OrCAD Capture 16.5 the icon size is too small how to increase it. I deleted the "ini" file and then reinvoked the capture and have installed the latest hotfix also. It is happening only...
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PDN ANALYSIS: Power network analysis failing
Hi,While simulating for (decoupling analysis ) Power network analysis in PDN analyzer, am facing the following error. I have given all the load IC current, VRM and have assigned series elements...
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CIS Derive database part Schematic part Libraries
Hi all,Can anyone tell me which sections of the Capture.ini file will populate the "Schematic Part Libraries:" and the "Schematic Part:" drop down when you attempt a Derive Database Part operation...
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Integrating PSpice models with CIS Library
I am investigating adding PSpice modeling capability to existing CIS library database. The best way I have seen it so far, is to obtain or create a PSpice model .lib or other ascii, and use that to...
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.color files
Does anyone know if it is possible to set a variable in the env file so that Allegro looks in one place for .color (view) files insted of the local directory.Roger G
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Function Swap(Gate Swap)
Hi,I would like to Know the Procedure How to do Function Swap (Gate Swap)?in Allegro PCB Editor?What are settings need to be done at the Schematic level?Thanx in advance. Regards,Sekhar
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Problem seeing parts in capsym.olb e.g. OFFPAGELEFT-R
I am following the "Example circuit creation" steps in the PSpice User Guide. I ran into a problem when I reached the point to place the OFFPAGELEFT-R symbol.I added the capsym.olb library but, unlike...
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Locate a component by its reference on PCB - possible ?
Hello,Locate a component on PCB (with zoom on it) by its refernce on is very useful function, especially on complex PCBs with thousands nets/components. But it seems that this feature is missed in...
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