Need to fix the accuracy error

December 30, 2014, 2:44 am

≫ Next: Inquiry about Setting of Concept HDL 16.6

≪ Previous: WARNING(ORNET-1119): No PSpice Template for...

Hi ,

i have used 16.6 so28. My design units is mils. i can't increase the accuracy greater than 2. it shows error. Any one please help me out.

Thanks,

Karthik.

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Inquiry about Setting of Concept HDL 16.6

December 30, 2014, 6:58 am

≫ Next: Pan Scroll and mouse center button.

≪ Previous: Need to fix the accuracy error

Hi, everyone,

There are some questions about using Concept HDL 16.6.

1. When I uprev an old project, the Concept HDL showed "page forcereset all" to correct the pages setting errors. But when I close the dialog box, the software quit and I have no access to enter "page forcereset all".

2. How to set the directive retain_existing_xnets_and_diffpairs 'ON' ?

3. In15.X project, the directive TEXT_EDITOR is in the section START_GLOBAL of .cpm file. While in 16.6 it is in the section START_CONCEPTHDL. So after uprev a 15.X project , I use the 16.6 to change the TEXT_EDITOR (Tools->Option->Text Text Change ), but it does not work. Is this A bug?

Best regards

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Pan Scroll and mouse center button.

December 30, 2014, 3:06 pm

≫ Next: Error 32007

≪ Previous: Inquiry about Setting of Concept HDL 16.6

I am new to Allegro and was wondering if there was a way to d othe following:

1. Add scroll bars ?

2. Have the screen scroll while routing when the edge is reached ?

3. Have the center mouse button when clicked to pan to the current cursor location and center the screen ?

4. have zoom in and zoom out center at the cursor location ?

Thanks!

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Error 32007

December 31, 2014, 7:08 am

≫ Next: Update PCB from schematic

≪ Previous: Pan Scroll and mouse center button.

Hi all, I am new to using OrCAD so bear with me. I am following the flow tutorial and trying to create the netlist for my schematic to start the PCB layout. I am getting the 32007 error and am unsure why.

---------------------------
Error
---------------------------
ERROR(ORCAP-32007): Netrev failed.
Please refer to Session log or netrev.lst for details.
---------------------------
OK
---------------------------

Any help would be appreciated because I don't see any obvious errors? The dialogue box at the bottom of the window (which I assume is the "session log" indicates the following:

INFO(ORCAP-32002): Netlisting the design
INFO(ORCAP-32004): Design Name:
\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\CLOCK_INTERFACE_BOARD.DSN
Netlist Directory:
\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro
Configuration File:
C:\Cadence\SPB_16.6\tools/capture/allegro.cfg

Spawning... "C:\Cadence\SPB_16.6\tools\capture\pstswp.exe" -pst -d "\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\CLOCK_INTERFACE_BOARD.DSN" -n "\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro" -c "C:\Cadence\SPB_16.6\tools/capture/allegro.cfg" -v 3   -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
#1 WARNING(ORCAP-36006): Part Name "D1206_SCHOT_1206RF_WV_12D_40V, 1A" is renamed to "D1206_SCHOT_1206RF_WV_12D_40V,".
#2 WARNING(ORCAP-36006): Part Name "RELAY_EE2-12NUH-L_EE2-NUH-RELAY_EE2-12NUH-L" is renamed to "RELAY_EE2-12NUH-L_EE2-NUH-RELAY".
INFO(ORCAP-36080): Scanning netlist files ...

Loading... \\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro/pstchip.dat

Loading... \\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro/pstchip.dat

Loading... \\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro/pstxprt.dat

Loading... \\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro/pstxnet.dat
packaging the design view...

Exiting... "C:\Cadence\SPB_16.6\tools\capture\pstswp.exe" -pst -d "\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\CLOCK_INTERFACE_BOARD.DSN" -n "\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro" -c "C:\Cadence\SPB_16.6\tools/capture/allegro.cfg" -v 3   -l 31 -s "" -j "PCB Footprint" -hpath "HPathForCollision"
INFO(ORCAP-32005): *** Done ***
********************************************************************************
*
* Updating Allegro PCB Editor Board
*
********************************************************************************
INFO(ORCAP-32040): Updating Allegro PCB Editor Board

Spawning... netrev.exe -y 1 -n   -i "\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro" "\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro\CLOCK_INTERFACE_BOARD.brd" "\\192.168.32.3\BROBSON$\MY DOCUMENTS\ORCAD_PROJECTS\CLOCK_INTERFACE\allegro\CLOCK_INTERFACE_BOARD.brd"

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Update PCB from schematic

January 6, 2015, 5:25 am

≫ Next: Problem with ORCAD pspice simulation

≪ Previous: Error 32007

Inevitably in the course of working on the PCB layout I needed to make a change to the schematic. This is the first design that I've done with Orcad.

I got an error when placing a part and needed to update the schematic side - I needed to update a component. Now I am unsure how to push this change to the PCB side. I didn't really see this covered in the tutorial and I am afraid of screwing up the work I've already done. So how does one push a change from the schematic capture to an in-progress PCB layout?

↧

Problem with ORCAD pspice simulation

January 7, 2015, 1:26 pm

≫ Next: Some STEP Files Don't Work

≪ Previous: Update PCB from schematic

I am trying to build the circuit below when I try to proceed with the simulation I have gotten some errors. Would you please help me? Thank you for your help in advance!

I am using two AD844 contect in series with AD633

Here is the result after run the simulation

* Local Libraries : .LIB "../../../library/opamp.olb" .LIB "../../../library/misclinear.olb" * From [PSPICE NETLIST] section of Q:\Cygwin\cdssetup\OrCAD_PSpice/16.6.0/PSpice.ini file: .lib "nomd.lib"

*Analysis directives: .TRAN 0 100ms 0 1u .OPTIONS ADVCONV .PROBE64 V(alias(*)) I(alias(*)) W(alias(*)) D(alias(*)) NOISE(alias(*)) .INC "..\SCHEMATIC1.net"

**** INCLUDING SCHEMATIC1.net **** * source ABDUL R_R1 0 N00509 1k TC=0,0 R_R2 N00333 N00321 1k TC=0,0 C_C1 0 N001137 1u TC=0,0 V_V1 N00321 0 +SIN 0 1 150 0 0 0 R_R3 0 N001131 500 TC=0,0

**** RESUMING simulat.cir **** .END

ERROR(ORPSIM-15141): Less than 2 connections at node N00509.

ERROR(ORPSIM-15141): Less than 2 connections at node N00333.

ERROR(ORPSIM-15141): Less than 2 connections at node N001137.

ERROR(ORPSIM-15141): Less than 2 connections at node N001131.

ERROR(ORPSIM-15142): Node N001137 is floating

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Some STEP Files Don't Work

January 8, 2015, 2:32 pm

≫ Next: Export Drill file problem

≪ Previous: Problem with ORCAD pspice simulation

I am trying to use the 3D step package mapping capability in Allegro (16.6 S038), but find that many step files don't work. I am downloading step files from 3dcontentcentral.com. I find some work just fine, but others do not show up in the mapping window preview or when in the 3D rendering of the PCB. I am pretty sure there is nothing wrong with the step files because I am able to load and view them fine in Solidworks.

Is anyone else experiencing this problem or have any suggestions/workarounds?

Thanks

↧

Export Drill file problem

January 9, 2015, 2:01 am

≫ Next: How to download and add new libraries

≪ Previous: Some STEP Files Don't Work

Hi All,

My design have some pad with oblong type. The problem is that when I export drill file, I can't see those pad (with oblong type) on the file. So anyone know how to export this pad to the manufacture?

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How to download and add new libraries

January 9, 2015, 5:46 am

≫ Next: footprints are exported without padstacks in orcad 16.5

≪ Previous: Export Drill file problem

Hello there,

I'm currently using OrCad 16.6 Lite. I used OrCad a long time ago, so trying to re-familiarise myself.

I have found a PSpice library list (here: http://www.seas.upenn.edu/~jan/spice/PSpice_LibraryguideOrCAD.pdf, and I have found that one of the parts I wish to add to my design is included within the PHIL_RF.OLB library (part is BFG591). I don't seem to have the library PHIL_RF.OLB already installed, but I've found a webpage listing where they can be downloaded: http://www.parallel-systems.co.uk/products/pspice

Unfortunately, the links on the second webpage may be outdated, and don't seem to link to a download of the relevant libraries. I've tried searching for somewhere else to download the library, but no luck so far.

Can anyone let me know where to find these libraries to download?

Thanks in advance,

Jon

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footprints are exported without padstacks in orcad 16.5

January 9, 2015, 11:30 pm

≫ Next: For fabrication of PCB the board outline is not get enabled?

≪ Previous: How to download and add new libraries

Hi all,

I have received a .max file for extracting footprints which are need for my layout design in 16.5. i have converted the layout to .brd file. then i did export --->libraries. But in footprints there are no pads.The footprints are exported with padstacks also. i got a info after exported libraries. i have attached the error here. Pls help me to get a exact footprint as like in layout.

(---------------------------------------------------------------------)

( )

( Dump Library Log )

( )

( Software Version : 16.5P002 )

( Date/Time : Sat Jan 10 11:43:30 2015 )

( )

(---------------------------------------------------------------------)

*** file: D:/my designs pcb/Ramalingam/allegro/BACKUP1.brd ***

*** Creating all device files (see create_devices.log) ***

*** Creating padstacks. ***

T1_2_1 being dumped.

T1_2 being dumped.

T1_4 being dumped.

T1_5 being dumped.

48S32 being dumped.

T1_1_2_1_1 being dumped.

*** Creating package symbols (.dra and .psm) ***

dcjack being dumped.

ERROR: For symbol Symbol Definition "Dcjack", T1_4 padstack not found . Pin not added.

m4_hole being dumped.

ERROR: For symbol Symbol Definition "M4_Hole", T1_2 padstack not found . Pin not added.

ERROR: ERROR(SPMHCS-1): Symbol is missing a refdes.

jae_28con_rev3 being dumped.

ERROR: For symbol Symbol Definition "Jae_28Con_Rev3", T1_1_2_1_1 padstack not found . Pin not added.

ERROR: ERROR(SPMHCS-1): Symbol is missing a refdes.

sm_clock_4_pin_rev1 being dumped.

ERROR: For symbol Symbol Definition "Sm_Clock_4_Pin_Rev1", 48S32 padstack not found . Pin not added.

ERROR: ERROR(SPMHCS-1): Symbol is missing a refdes.

pot1 being dumped.

ERROR: For symbol Symbol Definition "Pot1", T1_2_1 padstack not found . Pin not added.

pushbutton being dumped.

ERROR: For symbol Symbol Definition "Pushbutton", T1_5 padstack not found . Pin not added.

ERROR: ERROR(SPMHCS-1): Symbol is missing a refdes.

*********************** Summary *********************

ERRORs reported: 47

Number of padstacks dumped: 6

Number of package symbols dumped: 6

Total number of symbols dumped: 6

*****************************************************

↧

For fabrication of PCB the board outline is not get enabled?

January 10, 2015, 3:46 am

≫ Next: Placing Notes/Markers on PCB Layout

≪ Previous: footprints are exported without padstacks in orcad 16.5

I had finished the board and then i had see the worked layers using the GC prevue tool for the errors occurred.

Then in that outline of board does not shown, then again checked with the brd file. The outline is visible in board geometry----> outline option.

The outline of my board is not get enabled during the artwork generation. Then any other option is been is to use it to add the outline of board.

The GC prevue tool layer is been shown below.

http://s16.postimg.org/lnfjxln2d/Error_Message_46.png

Check the above link for the error message.

↧

Placing Notes/Markers on PCB Layout

January 10, 2015, 11:47 am

≫ Next: Is there any option to assign net manually

≪ Previous: For fabrication of PCB the board outline is not get enabled?

Hi,

Does anyone know of a way to place a note or marker in OrCad PCB Designer, similar to adding a sticky note on a PDF in Adobe Reader?

When doing PCB reviews it would be incredibly useful to be able to place a note on a point in the layout which could easily be found later when discussing potential problems.

Thanks in advance for any help,

Tom

↧

Is there any option to assign net manually

January 12, 2015, 12:43 am

≫ Next: no waveform at the output of oscillator

≪ Previous: Placing Notes/Markers on PCB Layout

HI all,

Is there any option to assign net for vias and components by manually in orcad pcb editor 16.5.

Regards,

Srimathi

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no waveform at the output of oscillator

January 10, 2015, 12:33 pm

≫ Next: Outline width can be increased directly in PCB editor?

≪ Previous: Is there any option to assign net manually

I set up an oscillator using two CD4069 but has no signal at the output only a pulse maximum 2ms. Student would like to help and clarification. Photo attached.

https://plus.google.com/photos/117043993678541324544/albums/6102812006592299089?banner=pwa

↧

Outline width can be increased directly in PCB editor?

January 12, 2015, 2:55 am

≫ Next: How to enable the cut mark for Board fabrication?

≪ Previous: no waveform at the output of oscillator

Can i directly change the width of the board outline?

↧

How to enable the cut mark for Board fabrication?

January 12, 2015, 3:04 am

≫ Next: DXF file exporting PCB editor makes board outline invisible?

≪ Previous: Outline width can be increased directly in PCB editor?

For my board i want to give cut mark behind the board. Our PCB fabrication company , they suggest to give the cut mark for the PCB.

I don't know how to configure the cut mark behind the board. In case, if put cut mark behind board means what is the procedure to give it.

Any idea about cut marks provided in PCB panel cutting.

Any help, Thanks in advance.

↧

DXF file exporting PCB editor makes board outline invisible?

January 12, 2015, 7:55 pm

≫ Next: font changes?

≪ Previous: How to enable the cut mark for Board fabrication?

For exporting the DXF file from .brd file, the board outline is not get enabled in the auto cad drawing. Simply i had put the line for the board outline and then exported to DXF.

After exporting, board outline is not get enabled, components are only get enabled. How to view the board outline in CAD drawing?

The image link is attached http://s28.postimg.org/a2wcnzqnh/Error_Message_47.png .

While exporting to DXF file, Board outline, drill, 0 layer,OBS SSTOP, OBS SSBOT layers need to viewed in cad drawing. How to enable it while exporting.

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font changes?

January 14, 2015, 4:55 pm

≫ Next: Allegro PCB --> Export Placement ????

≪ Previous: DXF file exporting PCB editor makes board outline invisible?

Is there a way to use alternate fonts on a PCB design yet?

↧

Allegro PCB --> Export Placement ????

January 15, 2015, 8:35 am

≫ Next: Design Entry CIS to PCB Editor/Allegro

≪ Previous: font changes?

I have a two sided PCB and the goal is to generate two placement files; one for the top, and one for the bottom.

How is this accomplished?

Currently if I run File --> Export --> Placement, it generates one file with the top and bottom components mixed together in one file. Also the bottom side coordinates appear to be relative to the top origin looking through the board.

Tools --> Reports -->Component report seems to generate the same mixed result.

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Design Entry CIS to PCB Editor/Allegro

January 15, 2015, 4:33 pm

≫ Next: Change component footprint while editing Board

≪ Previous: Allegro PCB --> Export Placement ????

Hi,

I'm new to Cadence and I have a .dsn file and would like to transfer the design to PCB Editor to work on the PCB layout. I tried to do the Netlist for the design and encountered some errors:

1 ERROR(ORCAP-36035): Multiple pin H8's which have different nets connected for U2: A20_PAD_STD, P07: DDR3 8bit x 4pcs (121.92, 30.48).

#50 ERROR(ORCAP-36035): Multiple pin K2's which have different nets connected for U3: A20_PAD_STD, P07: DDR3 8bit x 4pcs (198.12, 30.48).

#140 ERROR(ORCAP-36035): Multiple pin B8's which have different nets connected for U2: A20_PAD_STD, P07: DDR3 8bit x 4pcs (121.92, 30.48).

ERROR(ORCAP-22006): 'U3.G9' is tied to nets 'GND' and 'SCKE'.

ERROR(ORNET-1006): Netlist failed or may be unusable.

Please help me on how to solve these problems and I have to work on the design urgently. Any help would be greatly appreciated.

Thank you very much.

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