https://imageshack.us/i/p1XX0PUKp
the V lines I probe is not Clines. What are they?
the pin and power plane share the same VDD net. So, the Vlines are connecting the pin to the plane
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What's this V line? (it's Not Clines)
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How can I reuse the exported symbol?
I exported all symbol (dra, psm, padstack etc,.) from reference board, but I tried to design a new PCB board using the exported symbol. I don't know how I can use the them. I tried to designate the path of padpath and parapath to User Preferences Editor, but there was never any change. Could you please some tips to reuse them?
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Can anyone share DDR2, DDR3 Jedec UDIMM design files?
I don't have an account with Jedec and I like look at the layout how's the memory being done.
thanks in advance
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OptimizePI Frequency/Time Range sweep
I'm running a post-layout analysis. How is the Frequency/Time Range sweep applied?
Is it applied on the power planes per the mesh that's created?
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Annotate heterogenous parts in complex hierarchical designs
Hi,
I have run in to a problem. I have a complex hierarchical design where the hierarchical sub-schematic contains a heterogenous part. The part has a GROUP property to keep it together in a normal non-hierarchical annotation. The problem is I cannot see how to separate this part across multiple instances of the sub-schematic. The GROUP property stays the same in each instance of the sub-schematic and Capture gets confused. Is there a way to automatically append some kind of hierarchy block reference to the parts inside a sub schematic?
Regards
Jens
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TCL scripting to get fewer property fields in generated PDF
Hi ,
When I generate PDF using TCL scripting there are lots of unwanted property fields in component menu.
Please help me filtering these fields.
I only want to selected fields like
1) Manufacturer part name
2) Package
3) Part refrence
etc.
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Why the DDR3 Data constraints like that?
MIN ETCH MAX ETCH
(mm) (mm)
ECS DATA1 17.400 17.500
ECS DATA1_PLUS 19.900 20.000
ECS DATA2 18.000 18.100
ECS DATA2_PLUS 20.500 20.600
|
DATA1PLUS_BUS (24) | DATA1_PLUS | | | | | | | | |
DQS0 | DATA1_PLUS | | | | | | | | |
DQS0# | DATA1_PLUS | | | | | | | | |
DQS2 | DATA1_PLUS | | | | | | | | |
DQS2# | DATA1_PLUS | | | | | | | | |
DQS4 | DATA1_PLUS | | | | | | | | |
DQS4# | DATA1_PLUS | | | | | | | | |
DQS6 | DATA1_PLUS | | | | | | | | |
DQS6# | DATA1_PLUS | | | | | | | | |
DQ0 | DATA1_PLUS | | | | | | | | |
DQ1 | DATA1_PLUS | | | | | | | | |
DQ2 | DATA1_PLUS | | | | | | | | |
DQ3 | DATA1_PLUS | | | | | | | | |
DQ16 | DATA1_PLUS | | | | | | | | |
DQ17 | DATA1_PLUS | | | | | | | | |
DQ18 | DATA1_PLUS | | | | | | | | |
DQ19 | DATA1_PLUS | | | | | | | | |
DQ32 | DATA1_PLUS | | | | | | | | |
DQ33 | DATA1_PLUS | | | | | | | | |
DQ34 | DATA1_PLUS | | | | | | | | |
DQ35 | DATA1_PLUS | | | | | | | | |
DQ48 | DATA1_PLUS | | | | | | | | |
DQ49 | DATA1_PLUS | | | | | | | | |
DQ50 | DATA1_PLUS | | | | | | | | |
DQ51 | DATA1_PLUS | | | | | | | | |
DATA1_BUS (20) | DATA1 | | | | | | | | |
DM0 | DATA1 | | | | | | | | |
DM2 | DATA1 | | | | | | | | |
DM4 | DATA1 | | | | | | | | |
DM6 | DATA1 | | | | | | | | |
DQ4 | DATA1 | | | | | | | | |
DQ5 | DATA1 | | | | | | | | |
DQ6 | DATA1 | | | | | | | | |
DQ7 | DATA1 | | | | | | | | |
DQ20 | DATA1 | | | | | | | | |
DQ21 | DATA1 | | | | | | | | |
DQ22 | DATA1 | | | | | | | | |
DQ23 | DATA1 | | | | | | | | |
DQ36 | DATA1 | | | | | | | | |
DQ37 | DATA1 | | | | | | | | |
DQ38 | DATA1 | | | | | | | | |
DQ39 | DATA1 | | | | | | | | |
DQ52 | DATA1 | | | | | | | | |
DQ53 | DATA1 | | | | | | | | |
DQ54 | DATA1 | | | | | | | | |
DQ55 | DATA1 | | | | | | | | |
DATA2PLUS_BUS (24) | DATA2_PLUS | | | | | | | | |
DQS1 | DATA2_PLUS | | | | | | | | |
DQS1# | DATA2_PLUS | | | | | | | | |
DQS3 | DATA2_PLUS | | | | | | | | |
DQS3# | DATA2_PLUS | | | | | | | | |
DQS5 | DATA2_PLUS | | | | | | | | |
DQS5# | DATA2_PLUS | | | | | | | | |
DQS7 | DATA2_PLUS | | | | | | | | |
DQS7# | DATA2_PLUS | | | | | | | | |
DQ8 | DATA2_PLUS | | | | | | | | |
DQ9 | DATA2_PLUS | | | | | | | | |
DQ10 | DATA2_PLUS | | | | | | | | |
DQ11 | DATA2_PLUS | | | | | | | | |
DQ24 | DATA2_PLUS | | | | | | | | |
DQ25 | DATA2_PLUS | | | | | | | | |
DQ26 | DATA2_PLUS | | | | | | | | |
DQ27 | DATA2_PLUS | | | | | | | | |
DQ40 | DATA2_PLUS | | | | | | | | |
DQ41 | DATA2_PLUS | | | | | | | | |
DQ42 | DATA2_PLUS | | | | | | | | |
DQ43 | DATA2_PLUS | | | | | | | | |
DQ56 | DATA2_PLUS | | | | | | | | |
DQ57 | DATA2_PLUS | | | | | | | | |
DQ58 | DATA2_PLUS | | | | | | | | |
DQ59 | DATA2_PLUS | | | | | | | | |
DATA2_BUS (20) | DATA2
why DQ0 to DQ3 have ECS of DATA2 and DQ4 to DQ7 have ECS of DATA2_PLUS?
alternating.
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HELP - Horizontal Line Segment Width : 0.0000 Won't go away
I tried to create a shape around a pin to sink a few vias to a ground plane. I inadvertently created the shape on a power plane layer. I tried to delete the island that I had created on the power plane layer, but it left an outline of the shape as a 0 width line.
I try to Display-Status-Update to Smooth and I get the following error:
"1 dynamic shape is still out of date or empty. Run Out of date shapes Report from Status dialog to identify them."
There is no Out of date shapes Report in the Status dialog or anywhere else that I can find.
When I click Shape-Select Shape or Void/Cavity and pick the power plane into which I accidentally drew the Ground Net shape, I can see the outline of the shape. When I hover my mouse over the outline it tells me: "Horizontal Line Segment Width : 0.0000 Boundary VBAT Net name GND". However, I cannot delete it. It disappears when I deselect the VBAT shape. I can also see the VBAT plane filling in inside the 0 width line, so it appears to be filling in around what it thinks is a trace, I guess.
So, that is the shape that is the dynamic shape that is out of date or empty, but I cannot seem to do anything to get rid of it.
Any help would be greatly appreciated.
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Back annotation and reference designators
Hi,
Say I have a 0603 resistor .dra and its reference designator is R*. Now I want to reuse that same .dra for a capacitor. Forward annotation results in the .dra inheriting the schematic reference designator, i.e. C*. Reverse annotation inherits the .dra reference designator.
So, do I have to create two nearly identical .dra's; one with C* and the other with R* for reverse annotation to preserve the prefix from the schematic?
Thanks!
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pin pairs added to wrong match group
I'm using Allegro 16.6 S042. I have a DDR4 address bus with a driver, 3 receivers and a termination resistor. I want the bus to be matched length to each receiver. To do this, first I create the constraint (relative propagation delay) and topology for a single net in SigXplorer. There are three constraints, one per receiver. I create a net class containing all the address nets. I create an ECSet with three ECSM match groups. Then I apply the ECSet to the net class. This correctly generates 3 match groups and all the pin pairs for driver.receiver1, driver.receiver2 and driver.receiver3. However, the problem is that some of the pin pairs are in the wrong group. For example, the match group for receiver1 should have all pin pairs from driver to receiver1 but some are from driver to receiver2. The correct number of nets are in the match group, like address bit 0 will have the right pin pair but address bit 1 will be the wrong pin pair.
How do I move the pin pairs around between match groups? Since they are auto-generated, they won't let me edit them.
thanks!
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Deleting existing artwork files
Hi,
Is there a way to have Allegro delete the existing files or overwrite the existing files when generating new artwork ?
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show drill sizes?
When creating a footprint, is there a way to *see* the drill holes, just to make it a little easier to verify that the hole sizes look good?
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Cross probe issue
Normally when you select a component or a net on the OrCAD schematic (ver 16.6), the according component or the traces will zoom-in and highlight. For some reason, my PCB Editor zooms in, but not highlighting the components/nets. Also, my current settings reverse the cross-probing. That is, I select a component in the PCB Editor and the schematic highlights the according component.
Thank you very much.
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Snap to grid does not work. (V16.6 P004)
Snap to grid does not work. (V16.6)
Well, kind of. Typically when I drag a component, my cursor snaps to the grid while I’m dragging (mouse button is held). However, it is not, but it snaps when I release the mouse button. Where do I change the setting?
Thanks.
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Definitions of find menu
I've tried searching the help documentation but can't figure out what the follow are in the Find menu:
1) Difference between Comps and Symbols
2) What are Functions
3) What are Rat T's
Thanks!
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MOSFET Models
Hi, firstly sorry if this is posted in the wrong forum.
I need to build from scratch a 4 terminal MOSFET model G S D and Bulk to model a lateral device. Does the PSPICE Model Editor allow me to do this?
If not any suggestions on the best starting point?
rgds
S
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PDF and DXF generation for all film
Hello All,
Is there any skill file with that i can generate the pdf and dxf for all films in one time. If i have 20 layer or more than that i am spending more time to generate those file for each film. Is there any skill file so i can generate in single command. So i can save a lot of time. Please help me on this.
Regards,
Rohit
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Libraries for "connectors" and "discrete" components in Orcad Capture
Hello,
I'm using the licensed version of Orcad SPB 16.6 on my school computer but it doesn't have the libraries for "connectors" and "discrete" components that can be used for PCB schematic design. Please help me download these libraries from somewhere.
thanks,
Ram
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Selecting Class Package Geometry in Dimension Environment
I am trying to reuse the symbol in reference design file. When I opened dra file to modify symbol, I found specific subclass for dimension layer under Package geometry. But I can't draw any dimension on the subclass. How can I draw dimension the subclass?
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Occurrences reference designator assignment in complex hierarchical design
Hi all,
consider this AN
when he says:
"Note: As a part will have more than one occurrence in a complex hierarchical design, it is essential that all these occurrences have a unique reference designator in the design. For this, the yellow columns for the parts must have unique reference designator. Therefore, for a complex hierarchical design, the preferred mode of annotation is Occurrence. This ensures that each occurrence gets a unique reference designator."
what does it means?
when in occurrence annotation mode,
1)sub-circuit reference designators change automatically at each hierarchical block placement/copy action
2)user have to change sub-circuit reference designators at each hierarchical block placement/copy action
I'm asking this because maybe I misunderstand and / or I forgot to set something
if I copy a hierarchical block, the reference designator does not change automatically, and I want that it does.
I had some problems also manually change the reference designator in sub-circuits by double click text to open the display properties dialog, changes made in one occurrence affects other occurrences and other weird things ...
the only way is to change the reference designator manually in property editor view.
i'm using Orcad Capture 16.6-S032.
Thanks
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