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conditional with funckey?

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I have a custom key set in PCBENV:

funckey Home replay g5

When I press Home, it plays a script to change grid to 5 mils. If I'm using metric instead. I'd like to run a different script.

Is there a way to test what the units are set to?

pseudocode:

if metric

run metric script

else

run inches script

Thanks for any ideas..


Importing OrCad Layout plus into Allegro PCB Editor 16.5

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I am trying to get an edited dxf shape into PCB Editor 16.5 but I am having no luck with the dxf import.

The shapes all come in wrong and the fixing holes do not import at all.

So I have imported the dxf into my old copy of Layout Plus and it has worked correctly.

But now I am having troubles importing the .max file into PCB editor! The fixing holes are only coming in as pads once I have does the OrCad translation. There are a number of text files left in the directory which appear to be the component fixing holes but I can not find how to import these fixing holes into the Allegro PCB Editor.

Can anyone help?

Exporting to .dxf

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Hey, I have a quick question about exporting a design to .dxf. 

I have a rectangular board outline defined by a rectangle with line width 0.  It looks like perhaps the board outline is not being generated as part of the .dxf because of this?  Is there a way to get around this?

CIS Configuration - Database

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Hello,

Is it possible to have multiple 'Orcad Property Names' linked to the same 'Table Property Name' when configuring a database. Please see the picture here of my current database configuration (https://www.dropbox.com/s/neq6k5j6wpfo87k/Capture.JPG?dl=0) . My current configuration has the Manufactures name linked to 'Value'. This is a bit annoying because the schematic symbols by default displays the 'Value' field, which is linked to the Manf Name. I would prefer that the symbols display the MPN instead by default. Can I have line 9 in the attached picture linked to two 'Orcad Property Names' (ie...MPN and Value)? I have tried using commas, semicolons, colons, slashes but nothing seems to work here.

Via holes display incorrectly?

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Hello all, I am using the demo version of PCB editor v16.3 and I am a new user of this software (I am a student working on a school project). What I am trying to do is to have 2 conductor shapes on the top and bottom layers connected through a via. I do not wish to have any pads, I simply want a hole to be drilled and plated so that the 2 top and bottom conductors are electrically connected. For this purpose, I defined a via padstack with pads smaller than the hole diameter. Now when I insert the via in the layout, I get the following result

where the top conductor shape (green) has been correctly carved out in a circle with diameter corresponding to the via hole.

Now my question is, why is the bottom conductor shape (yellow) not carved out in the same way? I did define my via as a Through type. Does it mean that my via is not correctly defined? What should I do to ensure that I really do have a through via there?

Thank you,

Simon

SKILL function to map Packages to STEP files

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Hey guys,

I'm attempting to automate the package/STEP file mapping process. I do not see any allegro or SKILL commands that will allow me to feed in a STEP file and a footprint name and map the two. Is there any way to accomplish this? How do people deal with mapping 100+ parts to STEP files right no? 

i.Mx6 SoloLite, 0.5mm BGA fabrication

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Hi ,

I am presently working on i.mx6 sololite processor based project which is having 0.5 mm pitch.hence bga breakout is maintained as 3mil tracewidth and 3.33 spacing.

i'll be very much thankful, if anybody can suggest a Fabrication House for this application in India, its getting critical at the moment.


Thanks.

Prashanth

Problem with sub-circuit symbol

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Hello,

I'll try to be concise, I am currently trying to create a sub-circuit in OrCAD.

I created a model on Model editor.
I created a symbol on Orcard.
I associated my model with my symbol by using model import Wizard.
I associated symbol pins with my model terminal.
I included my library in configuration file.

Now i can use my sub-circuit in my project, nevertheless i can't connect pins of my sub-circuit symbol with wires and i dont understand why... (Wire passes through my pin symbol, there is no connection)

Futhermore i got a cache update error when i edit my sub-circuit : "CAP00027 : Design update failed while updating 'name of my sub-circuit' in library C:\CADENCE\SPB_16.3\TOOLS\PSPICE\'name of my sub_circuit'.OLB.  Object not Found

I check the path way, my file.OLB is at the correct place.

I'm completely blocked, thank you in advance for helping.


Delay Tune

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I am using Delay Tune to do some length matching on some traces and I was wondering if there is a way to see the length while I am actively tuning a trace?  Right now, I have to guess at the length, end the Delay Tune command, check the length and if it isn't correct/adjustable to the way I want it, then I have to 'undo' and try again.

Thanks.

--Mark

LDS MID layout desgin

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Dear Friends

 

I need help in LDS (Laser Direct Structured) MID single layer design using allegro platform

 

Is possible to do the design using allegro platform or it has any dependency ?How to take care of 3D bending of track length in 2D design .

 

How The NEXTRA® 3D Layout add on software helps in this

 

Sharing few links related to LDS

 

https://www.youtube.com/watch?v=D3Rp4KFxZkU

http://www.lpkfusa.com/mid/lasersystems.htm

 

Please share your thought it will be really helpful for me

 

Best Regards

Girish Kumar

Rotating multiple lines of text

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I have a number of lines of text I would like to rotate 90 degrees . I am able to spin then but they all end up in the same position. Is it possible to rotate multiple line's of text ?

PADS to Allegro Conversion issue (Refdes Not assigned while Conversion)??

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Hi everyone,

I convert the PADS Layout File into Allegro.While conversion for few component net name as well as Ref des not Assigned.Let me explain any one how to fix this problem.I copied option file from C:\Cadence\SPB_16.6\tools\pcb\bin which located in my working folder.

i got view log i could not solve this 

Translating C:/Users/20077317/Documents/My Received Files/test1/58B-06-10020_pads.asc.
Using translator version @(#)$CDS:  pads_in.exe v16-6-112CV 10/11/2014 Copyr 2014 CADENCE DESIGN SYSTEMS.
Reading PADS ASCII file header.
 Version = PowerPCB2005.0
 Route Layers = 10
 Units = MILS
 Hatch mode = Vertical / Horizontal
 Hatch grid = 50.000000, angle = 0.000000, anti-pad spacing = 12.000000
Warning: Design contains non ascii character(s).
 *MISC*
 *MISC*
 *MISC*
 *MISC*
 *MISC*
Initializing new database.
 Creating layers.
Reading PADS ASCII file body.
 *REUSE*
 *TEXT*
 *LINES*
 *VIA*
 *PARTDECAL*
 *PARTTYPE*
 *PART*
 *ROUTE*
 Writing routes.
 *POUR*
 *MISC*
 *MISC*
Information: CSet 1_2_3 renamed to DEFAULT

Warning: Allegro doesn't support default electrical CSets.
	Please assign electrical cset DEFAULT to the objects manually.
 *MISC*
 *MISC*
 *MISC*
 *END*

===============================================================================
 PADS layer usage summary:
  Layers 1 to 10 are route layers.
  LINES:
     0 BOARD GEOMETRY - ALL
     1           ETCH - TOP
     2           ETCH - InternalPlane1
     3           ETCH - Signal2
     4           ETCH - Signal3
     5           ETCH - InternalPlane2
     6           ETCH - InternalPlane3
     7           ETCH - Signal4
     8           ETCH - Signal5
     9           ETCH - InternalPlane4
    10           ETCH - BOTTOM
    13  * Not mapped!
    14  * Not mapped!
    15  * Not mapped!
    20  * Not mapped!
    26 BOARD GEOMETRY - SILKSCREEN_TOP
  COPPER:
     1           ETCH - TOP
     2           ETCH - InternalPlane1
     5           ETCH - InternalPlane2
     6           ETCH - InternalPlane3
     9           ETCH - InternalPlane4
  TEXT:
     1           ETCH - TOP
     2           ETCH - InternalPlane1
     3           ETCH - Signal2
     4           ETCH - Signal3
     5           ETCH - InternalPlane2
     6           ETCH - InternalPlane3
     7           ETCH - Signal4
     8           ETCH - Signal5
     9           ETCH - InternalPlane4
    10           ETCH - BOTTOM
    13  * Not mapped!
    14  * Not mapped!
    15  * Not mapped!
    16  * Not mapped!
    20  * Not mapped!
    21 BOARD GEOMETRY - SOLDERMASK_TOP
    22  * Not mapped!
    23  * Not mapped!
    24  * Not mapped!
    26 BOARD GEOMETRY - SILKSCREEN_TOP
    28 BOARD GEOMETRY - SOLDERMASK_BOTTOM
    29 BOARD GEOMETRY - SILKSCREEN_BOTTOM
  DECALS:
    14  * Not mapped!
    18  * Not mapped!
    19  * Not mapped!
    26 PACKAGE GEOMETRY - SILKSCREEN_TOP
  PADS:
     0           ETCH - internal_pad_def
     1           ETCH - TOP
     2           ETCH - InternalPlane1
     3           ETCH - Signal2
     4           ETCH - Signal3
     5           ETCH - InternalPlane2
     6           ETCH - InternalPlane3
     7           ETCH - Signal4
     8           ETCH - Signal5
     9           ETCH - InternalPlane4
    10           ETCH - BOTTOM
  VIAS:
     0      VIA CLASS - internal_pad_def
     1      VIA CLASS - TOP
     2      VIA CLASS - InternalPlane1
     3      VIA CLASS - Signal2
     4      VIA CLASS - Signal3
     5      VIA CLASS - InternalPlane2
     6      VIA CLASS - InternalPlane3
     7      VIA CLASS - Signal4
     8      VIA CLASS - Signal5
     9      VIA CLASS - InternalPlane4
    10      VIA CLASS - BOTTOM
    21  * Not mapped!
    28  * Not mapped!

 WARNING: 662 data objects mapped to the UNUSED class were ignored.
===============================================================================

Creating C:/Users/20077317/Documents/My Received Files/test1\58B-06-10020_pads.brd.
Loading netlist:
C:/Users/20077317/Documents/My Received Files/test1\58B-06-10020_pads.TXT

Total Combined Netlist and Device File Warnings =  11.
Total Combined Netlist and Device File Errors   =  565.
See netin.log for details

Writing database.

 Creating padstack definitions.
 Creating symbols.
 Creating independent data.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE1'.  Can't create shape/polygon. iges id 170. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE1'.  Can't create shape/polygon. iges id 172. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE1'.  Can't create shape/polygon. iges id 174. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE1'.  Can't create shape/polygon. iges id 176. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE1'.  Can't create shape/polygon. iges id 178. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE1'.  Can't create shape/polygon. iges id 180. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 182. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 184. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 186. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 188. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 190. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 192. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 194. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 196. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 198. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE2'.  Can't create shape/polygon. iges id 200. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 202. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 204. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 206. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 208. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 210. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 212. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 214. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE3'.  Can't create shape/polygon. iges id 216. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE4'.  Can't create shape/polygon. iges id 218. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE4'.  Can't create shape/polygon. iges id 220. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE4'.  Can't create shape/polygon. iges id 222. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE4'.  Can't create shape/polygon. iges id 224. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE4'.  Can't create shape/polygon. iges id 226. Continuing.
 WARNING ERROR(SPMHDB-184): Unfilled SHAPE may not exist on layer 'ETCH/INTERNALPLANE4'.  Can't create shape/polygon. iges id 228. Continuing.

Closing database.
Loading constraints...
Loading constraints complete. See techfile.log for details.
Translation complete.
Finished reading input file with no errors.

Power Vs Impedance graph in Cadence Orcad

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Hi,

I am trying to plot the power dissipated in a resistor vs the resistance (parameter sweep) in Orcad. In case the power source were DC with an internal resistance, I would have got a graph which has a peak at a particular load resistance which matches the internal resistance of the source. A DC sweep with resistance as the parameter should yield me the required result. However, in my case the source is an AC signal with an impedance. I am trying to see at what value of load resistance, the power peaks. I tried using Transient analysis with a parametric sweep on the load resistance, however, the X-Axis is still time. I am trying to see, if I can plot an Average Power Vs Resistance graph to find the maximum power point. Please let me know if such a functionality is possible in Orcad and if yes, kindly suggest the steps to be followed.

Thank you.

Regards,

Ashare

Moving a board outline segment with arcs.

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I have a rectangular board outline with the 4 corners arc,ed. I need to move the vertical straight segments out a few MM.

When I select SHAPE/SELECT SHAPE  select the outline and try to move a straight segment I get the following error: W- (SPMHGE-609): Arc segment editing not supported.

Is there any way to easily get around this ?

unplated holes

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As a common practice in OrCAD PCB Editor, I create the unplated hole by putting a small pad that is smaller than the drill size, so it will be drilled away.  The problem is, the DFM checking software from PCB companies always complains about that and cause a lot of time wasted in communication.  Is there a way to create an unplated hole without any pad on it?

Thanks.


In-Line voids for specific diff pair vias/TH pins

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Hi All,

I'm getting some designs that they are requesting to have clean voids around vias/TH pins for certain diff pairs.

I see that in global dynamic shape parameter under void controls tab there is a way to create in-line voids. 

I would like to have similar voids, but to only specific vias/TH instead of entire board.  (Cuts out too much PWR/GND planes)

Has anyone come up with easy solution for this?

I've created via with specific anti etch, but the orientation of the vias needs to be adjusted and I would like to make it pretty fool proof.

Please let me know if anyone has any suggestions.

assign keys in Capture?

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Is there a way to assign the scroll wheel to zoom in and out?

Is there a way to assign a key to the "AutoConnect two Points" command?

annoying "ding" while routing diff pairs

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I'm routing a board with 576 diff pairs and every time I click to place a vertex I get an audible "ding". I have tried turning off all analysis modes and that doesn't seem to help. It doesn't do it if I route a control signal so it has something to do with diff pairs checking. It is getting very annoying.

 I just updated to the latest hotfix. Don't recall Allegro doing this before. What is up with that?

Phil

what is a .gen ascii file?

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Anyone know which cad software a .gen ascii file came from? What other software can open and view this data besides wordpad, notepad.

Looking at the ascii file the first 2 lines are below. Its looks like stencil and some placement data.

Thank you for the help.

# *** LAYOUTS ***
S1 JD POF-1W

Off Grid.

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When you add  or move something how can you get the program to move the object off grid. ? For example I take a shape and try to move a line segment it moved increments of the current grid. Is there any way to turn off the snap to grid ?

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