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Bug in Capture: Properties Spreadsheet

July 16, 2015, 6:17 am
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Hi all,

This is a hard bug to describe.  I have a complex multi-page schematic.  No heirarchical blocks, just multiple pages, off-page connects and refdes control (page number prefixes for ref des).  I select all the components in a particular page, (i.e. selection filter set to parts only), right-click on one of the selected parts and click on Edit Properties to bring up the property spreadsheet.  I then sort by the value column (double-click the column header).  I then change a value of one part and then drag the value into multiple cells (i.e. drag the little plus sign on the bottom-right corner of the first cell).  The problem is that more than one column gets changed.  I wanted the value to change but another column somewhere to the left gets changed as well as if I dragged the top cell contents to lower cells on that column as well.

This bug has caused a big headache for me as I use the value field for components that have values, such as resistors or capacitors, but for ICs or connectors, etc. I put a dummy value in this field (that I filter out later in the BOM output) and create a part number property to display on the schematic (helps with BOM generation).  When I do the drag operation to the value field, all my part numbers get changed.  I have lost several hours of work due to this bug.

I tried a to create a dummy design and could not reproduce the bug.  It does not always happen either.  The bug seems intermittent (or perhaps I am unable to identify what characteristics are present to make the bug happen).

Has anyone else encountered this?

Regards

Allan

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How to change schematic units in Allegro Design Entry

July 17, 2015, 3:04 am
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I am using Allegro Design Entry HDL and the 'Tools, Options, Grid' is set at metric.

But when I set it to Decimal, the constraints manager still shows the units as 'mm'.


How do I change the units so that I can read the constraints as mils?

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WARNING(SPMHDB-46): Illegal null pad. (VIA)

July 17, 2015, 11:38 am
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Hello, I'm running into a strange error that I can't quite figure out. I'm hoping for some assistance.  Here is the error (theres a bunch of different versions of the same error):

ERROR IN PAD STACK name = GND-BOTTOM
WARNING(SPMHDB-46): Illegal null pad.
Layer TOP

My board is a typical 4 layer board. The top and bottom are signal levels and the inner are power planes:

  1. TOP
  2. GND
  3. PWR
  4. BOTTOM

So I'm confused why for a GND-BOTTOM via, the top pad is even being checked. But even so, why it gives an error for a null pad there. Some items of reference...

Full error log: https://db.tt/5PGP8pkq

Photo of pad construction: 

If you have any ideas that would be great. I'm stuck here and really need to print my Gerber files for production. Thanks a lot.

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Assigning copper pour to a net

July 17, 2015, 3:30 pm
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Hello all,

I have another pretty simple question.  I want to fill the top layer of my board with copper pour.  The way I tried to do it was I took the board outline and did a Z-Copy and contracted the board outline a little and made that dynamic copper.  This works perfectly but the copper is not assigned to any net.  I can't seem to figure out how to assign this to a net.  I'm sure it's simple but I can't seem to find where to do this.  The options menu doesn't have the net field like it does when you're creating the pour from a shape.  

Hopefully that made sense. 

Thank you!

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Skill on PCB Viewer

July 20, 2015, 12:59 pm
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Hi,

Does SKILL works on PCB viewer (not free one)?

I get error: "E- Command not found: skill"

Please help.

Thanks,

Darshan

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Circular Shape PCB Board

July 20, 2015, 2:41 pm
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How do I create a circular shaped board outline with a fixed radius. I don't see an option for circular/elliptical shape in setup--> outline--> board outline.

Any help is appreciated.

Cheers

Savy

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ERROR [MNL0025]

July 21, 2015, 2:06 am
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i have following errors. Plz anyone can help me

ERROR [MNL0025] Layout DB Error code 18890, '1'.
ERROR [MNL0025] Layout DB Error code 18890, '1'.
ERROR [MNL0025] Layout DB Error code 18890, '1'.
ERROR [MNL0025] Layout DB Error code 21111, '329'.
ERROR [XLT0009] Unexpected unknown Exception.

 

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unable to add vias on one side of the board

July 22, 2015, 12:49 am
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Hi all, i am trying to design a multilayer PCB board.i have routed a large extent of the board but when i am at my final routing stages i am unable to add vias by double-clicking.When i try adding vias, my PCB editor  goes busy and is unable to respond.I am using allegro PCB editor version 16.5.How do i solve this please.

Regards

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Converting .dat files to csdf

July 22, 2015, 2:37 am
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Hi All,

I would like to know if there is a simple way to convert binary .dat files produced by AMS Simulator to .csdf or .txt format. (Perhaps a command line utility)

This would allow us to use python to process multiple simulation result files to automate various measurements.

The current workaround is enabling .PROBE/CSDF. However the problem with this is method is that AMS Simulator does not display waveforms while the simulation is running, so the engineer will not be able to visually observe incorrect results, if any, until the simulation is complete(which may take a few hours in some cases).

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Strange routing problem

July 22, 2015, 2:06 pm
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It happens suddenly - every attempt to connect or route finish with track that has no net (Null Net and Line to SMD spacing error). It also want to start route  from specific layer (in my case layer 5), even I am selected Top layer.

I try few things, check constraint manager, grids, route options, updating netlist, dehighlight all - but with no success. Since I am saving regular copies on every step, and older copy before few hours works normally, but current design just driving me nuts.

Any ideas? I am running version 16.6 s050 - I new there is hotfixes available, but just want to know if it is something I just enable by mistake.

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Exporting library from old design files

July 22, 2015, 2:39 pm
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Hi everyone,

I've been searching on this forum and others, and so far haven't found an exact answer to my issue and I'd really appreciate your input.  I'm coming back to OrCAD after a few years with other tools, and even then I was a relative newbie, so my knowledge in this area is fairly limited.

What I want to do is take our previous design files (.dsn and .brd) and dump the parts data into a library (.olb) and symbols files (.dra, .psm, etc).  Ideally, I'd like to upload these parts into our CIS database to use with data downloaded from CIP, but for now a local library is my first goal.

I have exported an .olb from my old .dsn file by copying the design cache to a new library and saving it.  I then exported the part symbols from the .brd file using Export > Libraries.  I updated psmpath and padpath to point to the symbols directories I exported the part data.  I also updated my capture.ini for both the library and symbol locations:

[Allegro Footprints]
Dir0=C:\git\new_design\Symbols\Board1
Dir1=C:\git\new_design\Symbols\Board2
Dir2=C:\Cadence\SPB_16.6\share\pcb\pcb_lib\symbols
Dir3=C:\EMA\CIP-E\Allegro_Library\symbols

[Part Library Directories]

Dir0=C:\git\new_design\Libraries
Dir1=C:\EMA\CIP-E\Schematic_Symbols

When a create a new design and add the new library I've created, I'm noticing that when try Show Footprint on a number of the parts I've placed from the new library, that I get the "Allegro footprint <PART> was not found in the search path" error message.  However, in the old design file, if I place parts from the design cache (not my new library), the part previews show up when I click Show Footprint.

The old design files were copied from our previous designer's machine, and therefore the paths in the design cache and symbols information are incorrect, which I thought might be the issue.  Do I need to run a Replace Cache on the old .dsn and point it to my new library before exporting again?  Do I need to run a Place > Update Symbols before exporting from the old .brd file?

Thanks!

Matt

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How to measure Net Etch Length considering vias in vertical direction using Allegro？

July 24, 2015, 2:52 pm
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Hi all,

I found that Allegro can't measure net length with via height between the routing layers, which is illustrated in following figures. These two connections actually have a difference of (board thickness * 2), but allegro seems just measure the length in horizontal directions, ignoring the height coming from via.

Total etch length 316 mil here:

Total etch length still 316 mil here. But actually there is a (2*Board Thickness) here which should be considered.

Is there any method in allegro that we can get the REAL net length including the trace length, and via height between the routing layers?

Thanks so much!

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How to Export PCB data out in *.PAR, *.NEC from OrCAD 16.6?

July 27, 2015, 11:05 am
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Need your help and support to find export options (for exporting complete Board data) from OrCAD 16.6 PCB Editor.

The fly probe test software excepts following formats (Shown below in the table) . Need to generate the required file format for thorough DFA and DFM analysis.

If its possible kindly help me get any of the following file format.

How to export *.CSV (ASCII file) from OrCAD 16.6 PCB Editor?

How to export *.FAB file from OrCAD 16.6 PCB Editor?

How to export *.PAR or *. NEC file from OrCAD 16.6 PCB Editor?

How to export *.MIN file from OrCAD Layout?

The only export options I am getting from the tool (OrCAD 16.6 PCB Editor) are as follows which do not work with Fly probe test tool we have.

*.ipc file format  IPC-356

*.XML file format IPC-2581

*.art file format for artwork.

*.txt file format from Fabmaster Dataout.

These do not work with the tool. 

The fly probe test software excepts following formats (Shown below in the table) 

Cad pack - Import

Code

Title

Rel.

Note

extension for cad files

81190398.19

Cad Pack - import from Academi

1

Updated

ALL,PAR,WIR,LIB,ART,JOB

81190399.2

Cad Pack - import from ARIADNE

1

Updated

PCA

81190400.07

Cad Pack - import from ASCII file

1

Updated

CSV

81120006.07

Cad Pack - import from Becker Automotive file format

1.02

ASC

81190401.08

Cad Pack - import from CADENCE

1

Updated

FAB

81190402.09

Cad Pack - import from Cadif

1

Updated

PAF

81190404.11

Cad Pack - import from CamCad

1

New

CAD

81190403.1

Cad Pack - import from C-Link

1

Updated

DIF

81190405.11

Cad Pack - import from Fabmaster

1

Updated

CAD

81190406.12

Cad Pack - import from Fatf

1

Updated

FAT

81190407.13

Cad Pack - import from GenCad

1

Updated

GCD

81190408.14

Cad Pack - import from Gerber

1

Updated

GBR, GDO, GER,.274X,GBD, SPL,CSN

81120005.06

Cad Pack - import from Landis & Staefa file format

1.02

STK

81190409.15

Cad Pack - import from Mentor

1

Updated

CMP

81120002.04

Cad Pack - import from NOKIA file format

1.12

PLT

81190410.08

Cad Pack - import from Orcad

1

Updated

PAR,NEC

81190411.09

Cad Pack - Import Orcad layout

1

Updated

MIN

81190412.1

Cad Pack - import from Pads

1

Updated

ASC

81190413.1

Cad Pack - import from Pcad

1

Updated

PDF

81190414.11

Cad Pack - import from PROTEL

1

Updated

CSV, .HYP, .PIK

81190415.12

Cad Pack - import from Redac Cadstar

1

Updated

CDI

81190416.13

Cad Pack - import from Scicards

1

Updated

REA

81190417.14

Cad Pack - import from Theda

1

Updated

TL

81190418.14

Cad Pack - import from TXF-OUT

1

Updated

TXF

81190419.15

Cad Pack - import from Veribest

1

Updated

MDB or MDC

81190420.09

Cad Pack - import from ZUKEN CR3000

1

Updated

CCF,UDF,WDF

81190421.1

Cad Pack - import from ZUKEN CR5000

1

Updated

PCF

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Editing Refdes of Library Builder Part

July 27, 2015, 7:17 pm
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Hi everyone,

I created a header using the Library Builder, which got assigned a reference designator U?.  I went into the Edit Symbols Properties and updated the Part Reference to J? and exported the symbol and footprint to my library.  Here's a screenshot:

When I go to place that part in the design, it is still using the U designator instead of J.  Is there another location where I need to update the refdes in Library Builder?

Thanks!

Matt

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Import Design: Reference Designators

July 28, 2015, 2:32 am
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Hi,

       I have an existing Allegro HDL schematic design (Project A) and PCB (.brd). I'm not starting a new design (Project B). The starting point for Project B is an internal project template (blank). As Project B will be heavily based on Project A I wish to start off importing this design into Project B. Project A is complex Hierarchical design, once I copy the top level sheet into Project B I lose the original reference designators.

1. Am I correct in thinking that there is now way to avoid this happening using a complex hierarchical design?  

2.  If it is unavoidable to loose the designators on import, should I be able to copy over the .brd file from Project A and back annotate the Reference Designators from the Project A .brd into the Project B schematic?

I cannot seem to find a way to make this work, we will encounter this scenario regularly within our organization, where an existing pcb is reused with some modification. It seems if the Reference Designators in the schematic are lost, then when I repackage then the Project A .brd file is not much use to Project B and the layout would have to be restarted.

 

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Allegro PCB 16.6 funckey show/hide subclasses

July 28, 2015, 10:27 am
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Hi,

I want to create a shortcut that will allow to show or hide layers that are visible. For example I press "x" and then Package Geometry / Silkscreen TOP appears and I press "z" and this layer hides. Any idea how can I do that?

Thank you in advance,

Krzysztof

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DRA - Adding Via in pad

July 28, 2015, 11:41 am
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Version: 16.6 S.053 (Latest Hotfix)

Editing a footprint trying to add a via in pad. --------------------NOTE this is a DRA file---------------------------

Issue: No available via

Tried adding a via to the Default PCS, however this Constraint Set does not show up in the CM.

Attempted to add a secondary PCS - never shows up.

Work around:  Exported the CS from 16.5 with the via I wanted in the PCS then imported the CS into 16.6 footprint.  The via now shows up, however it is in the Dsn Via field.

Is this a bug or am I missing something?

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Impedance/Length Matching Tracks in PCB Layout

July 28, 2015, 11:09 pm
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Dear All,
Kindly guide me which criteria should follow to do length and impedance matching in PCB layout?
Right now I have a design with different type of flip flops, Do I have to length match of data pins of Flip Flops or just rout them as normal signals?
In addition to my above query at which frequency range do we need to length match in layout?

Thanks

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How to remove.

July 28, 2015, 11:13 pm
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Hey,

I am new user for 16.6 version.I have issue with i made some changes on my schematic.I have remove some parts from schematic.Parts were removed successfully but traces/Tracks not removed.(Not a net)Traces not removed.I can remove it manually.But there must be some auto removal command.Is there any i can remove at once?

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Exact symbol rotation

July 29, 2015, 6:03 am
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If I rotate previosly symbol/component by mouse (or somebody left before me on 359.45deg),

what is the easiest solution to move/rotate the symbol to 0 or 360deg exact? Until now

fastest for me is to Unplace the component and place it again. Move/rotate/spin with absolute/incremental change

is not working for me, or I am missing something... again. It is same question if I want to rotate component from 0.5deg to 50 deg, etc.

How simple can be when one have the value in Show element, to change/correct it directly there?

Thanks!

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