hi
I m configured cis database ,after the place the schematic symbol from cis configured database getting the error message for "PLACE COMPONENT OPERATION FAILED" why this error message will came, after placed symbol there is no database in that symbol related.
Please give the solutions
I need to set NC Route to "Separate files for plated/non-plated routing" to be selected by default.There isn't a line in the parameter file to make that a default.
It is possible to give enough clearance for unconnected pins for copper pour. Is there any way to increase the clearance for the unconnected pins in Plane Layer? Currently use Orcad Layout.
I'm trying to convert an Altium Designer 16 schematic to Allegro Design Entry CIS so I can do the PCB layout in Allegro.
I spent most of the day yesterday on the phone with tech support at EMA with no luck.
We saved all Altium schematic sheets to ASCII file then used the "import Altium schematic" from CIS.
The Altium schematic is a hierarchical schematic and it seems the CIS importer is choking on some of the "harness" entities on he schematic.
We removed some of the "harness" entities and ultimately got the translator to create a dsn file, but when it was opened, it was obviously corrupted.
Has anyone successfully imported an Altium schematic into CIS using the Altium importer?
Any help would be appreciated.
When I to go to activeparts in orcad, Place parts - select ICA, the software goes to Cadence.com and not the ACTIVEPARTS screen. Am I doing something wrong ?
Is there an easy way to batch process the generation of DXF and PDF? I have a customer who wants a dxf and pdf of each layer. Doing them one by one is time consuming. Need something like the Gerber export but for DXF and PDF.
Tom
There are a number of manufacturers who are using the .bxl file format to specify the footprint.
Is there any reliable methods apart from using the UltraLibrarian software to import .bxl into .dra format.
Example : i made a design with four diodes but each one can come from NXP or ON SEMI or other.
I want to verify that whatever the mounted diode will be, the design will work => launching a PSPICE simulation for each combination of diodes.
That is i don't want to replace by hand one part by another one : i want all combinations to be done automatically in PSPICE.
The replacement is always of the same type : a BAS16 diode stays a BAS16 diode but comes from different manufacturer.
Is it possible with a TCL script in Capture or something else ?
Thanks !
Hi ,
My name is Balaji. I designed one PCB providing oval slots. But while converting into NC Drill file, the oven slots are not visible.
Thanks, 
Balaji.j
Hi All,
I am designing a PCB footprinting of APDS-9960(package is DFP) by Package Symbol in allegro . I designed the PAD as per the information in the datasheet, but the problem is that while design the PCB footprints the pads (pins) are overlapping .
I don't know what am I going to mistake .
I chose
w=0.6 mm (24mils)
h=0.72 mm (28 mils)
pitch=0.25 mm (10 mils)
can somebody help me ?
Thanks in Advance
I am trying to import the following model into PSPICE but I am getting an error.
http://www2.st.com/content/st_com/en/products/power-management/ac-dc-converters/high-voltage-converters/viperplus/viper27.html#design-scroll
I copy the 2 (.olb and .lib) files to c:/cadence/spb/tools/pspice/library
Inside orcad capture, I import the .olb file into place part.
next I add file (.lib file) into library under Design resources
I copy this same file into Model libraries under Pspice Resources
I have connected all the pins to ground.
Inside configuration fieles
But I get the following error.
How do I make it work? I have followed this On Semi guide to importing external vendor models.
http://www.onsemi.com/pub_link/Collateral/TND6045-D.PDF
Hi!
We're trying to create a padstack with voids like the following part (the outer large pad)
We get this error: "shape symbol cannot have a void in a shape". Unfortunately we can't do like in some of the online helps to make a small cut in the copper, as this is a microphone seal and we need good solder all around.
How would we go about making this pad in the shape editor?
Thanks,
Mitch
Hi,
I'm trying to learn Cadence PCB Editor Allegro GXL and Design Entry HDL 16.6. I searced for sample multilayer schematic and board files which are in same .cpm project, but i couldn't find. If you have any project file (.cpm-both schematic and layout files of same project in Cadence) or any idea and share, i will be happy.
Thank you
When I click the button to create a netlist from Design Entry CIS, the buttons to select the netlist directory or specify the input and output board files just aren't there. Even if I expand the window to the right the buttons don't appear as seen in the screen shot below. This same problem happens in v16.6-S062 and v17.2. It looks to me like the fonts are bigger than expected causing some stuff to get clipped on the right edge of the window. Any thoughts on how to fix this?
Hi all,
I'd like some help regarding Orcad 16.6 and complex hierarcical designs.
I have been tasked to convert a complex design with reuse modules from DE-HDL to Orcad 16.6. The reuse module has a 2 heterogeneous parts in it. I've packaged the module and made it into a library part. Because the module has a lot input output ports, i have also made it heterogeneous (18 sections 281 ports!). I've put four modules in my top level design. When i try to annotate, from tools->annotate->packaging tab, it sees each section of the module as a different part and puts 72 modules instead of 4. Also it does not put different reference designators inside each module. It produces a parts list with 36000 parts instead of ~2000 that should be and also i have multiple reference designators with the same name. I've seen this reply but when i try to do this, Orcad stops responding. Any ideas?
sfhshfghdfh
When i start up circuit space 4.2 running on allegro 16.5 i get this java error.
E can't find java to run javaw . where does this java reside? in the ema folder?
Thanks,
Tom
Hi All,
I am making the PCB of APDS-9960 in ORCAD 16.6 .
I can netlist (with the usual renaming warnings) and open the netlist in Orcad PCB. I get a (correct) list of parts when I go to Place/Manually - I load all the things into layout but problem is that while loading the 6 pin connector on the PCB designer layout it's not loading and showing the error " pin no. do not match between symbol and component"
I took the PCB footprint of 6 pin connector from the ORCAD library itself.
I don't know , which mistake that I am doing. Can somebody help me to solve this problem?
Any Instant help would be appreciated.
Thanks in advance
I have a SMT IC that has a center ground pad. The recommended footprint (enclosed) is showing five vias in the pad, one in the center and one in each corner. Does anyone know how to add these vias in the padstack? I understand that there is the ability of adding multiple drills in the pad designer, but it seems to want to put the same number of holes in each row and column. Thanks.
(Please visit the site to view this file)
hello guys,
in fact this is the first time that i design a pcb for manufacturing and i wonder if there is a specific rules or restriction to follow ?? thank you