Hi Forum,
I installed the 'Orcad and Allegro Products' Version 17.20 and the 17.02.008 hotfix.
Before installing the hotfix I could access PCB Editor Lite now its gone.
Where can I find it ?
Thanks
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Cannot find PCB editor Lite after installing 17.20.008 Hotfix
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ERROR(SPCOCD-171): Port exists in symbol but not in the schematic
ERROR(SPCOCD-171): Port exists in symbol but not in the schematic
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Via-In-Pad DRC Suport
I am new to Cadence - I am trying to use via-in-pad on a design, but I can't figure out how to do so without throwing a ton of DRC errors. How do I set up the constraints to allow placing a via directly on top of an SMT pad?
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Microvia and bbvia DRC support
First some background. I have an 18 layer board with four sets of microvias and a core bbvia.
L1/L2
L2/L3
L3/L16
L16/L17
L17/L18
Our initial layout had the five sets of vias stacked on top of each other (our vendor preferred this method but had trouble building it). I am tasked with moving the vias apart so none of them are stacked. In essence, I am moving the L2/L3 and L16/L17 vias, therefore unstacking them. I need to turn on a DRC that will flag any stacked vias, as I have thousands on the board. I have all of the other DRCs working, microvia-microvia, microvia-bbvai, etc (I have the Miniaturization license) but cannot find a DRC that will flag the stacked vias (ex. L1/L2 stacked on top of L2/L3) while not reporting vias that are in the same x/y but have a layer of separation between them. I can have an L1/L2 microvia in the same x/y as the L3/L16 core bbvia location. Please let me know if you need more details.
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Including Router Paths in 3D views
Question out to the community:
I would like to include a router path, on the NC_Route layer in my design, and I want to model that as part of my 3D board in the MCAD world as well. I know of the ncr2iff skill script that is available to convert the outline of NC_Route to board outline, but I don't like how static that becomes (i.e. if I need to change the NC_Route path, then there is some work required to re-do everything). I've explored the IDX methods quite a bit and have talked directly with Cadence on how to get the NC_Route layer exported in IDX, but have had little to no success with importing that to a MCAD tool.
I think the root of the problem is that the router path is being exported as a line with a thickness, and the MCAD tools that I am using (primarily CREO) do not understand that, and need a 0-width line boarder of the shape being routed out. That is what the ncr2iff skill script does, I'm just wondering if there are any other thoughts on how to do this?
Is there anyone else that creates router paths that needs to be in your 3D model? How do you export those for use external to the PCBA tools?
Thanks for any thoughts/help.
~ Pat
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correct RF shield footprint, with parts inside
Hi, I have a footprint for a RF shield. I'm getting a lot of DRC errors "package to package spacing", basically for any part that is placed within the RF shield.
Here are screenshots. What would be the appropriate way to handle this footprint, so that it would not produce these errors?
.
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HOW TO ADD VIA
Greetings,
1. I have a self-made 4-pin connector by went through padstack design steps. ALso I have used "shape add" created a ground plane. How could I connect one of the pins to this ground plane? I'd like directly connect the pin to this plane without thermal relief.
2. Start from a surface mount pin or a through hole pin, I use "add connect (F3)" start drawing wire, then I want to end this wire as it is connected to ground plane which is created by using "shape add" . How to do this?
3. How to place a via that connect to the "shape add" plane (right-side picture)?
I know these are not cutting-edge problems but for a beginner I am looking for simple steps and answers. The HOW-TO videos on youtube are helpful but not for beginners.
Any help will be appreciated.
Thanks
Cheng
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How to create via (2)
Greetings,
How to create vias with different sizes like the following?
Thanks
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Is there a good tutorial on how to set up Orcad CIS local library's?
I am trying to add parts and sections to the CIS Local Part Database. Are they any good tutorials that are easy to follow?
New user here.
Thank you
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ERROR (SPMHA1-141) Invalid sector row. Contact Cadence customer support.
All,
I'm using version Orcad PCB Designer Professional version 17.2 and I received this weird error after modifying a footprint drawing and saving it. I'm not sure what it means and haven't seen anything else online similar to it. Does anyone know how to fix it or can explain what it is? I am not able to open the footprint anymore because of the error. I tried running DBDoctor with no luck. Luckily though it was a simple footprint so I am going to delete it and create it again (new).
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Install 16.6 and 17.2 on the same pc
Hi
I am currently use 16.6 and want to explore 17.2 but I don't want to give up 16.6 yet because I don't to stop my work flow.
Is there the way that I can install both versions on my PC and switch back and forth as I needed.
Thanks,
Regards,
Tibo
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Following up the subject of Cadence 16.6 and 17.2
Hi all,
I am appreciate for all of your help. Since I am about to get cross over to the new 17.2 from 16.6
Do any of you have problem with the libraries, for example: Do you have any problem using lib created with 16.6 in 17.2 and via versa?
If you do, please let me know what I have to watch for? How smooth is the 17.2 software going so far?
Thank so much,
Regards,
TiBo
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HOW TO GENERATE GERBER WITH SUPPRESS UNCONNECTED PAD
1)MANUFACTURING------ARTWORK------SUPPRESS UNCONNECTED PADS is enough for all internal layers(including planes) with positive plot mode
are any other setup required. Looking for earliest reply.
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NA
I
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17.2 vs. 16.6 Menu Icons are small - How to Fix?
Hello, I have 17.2 running and the menu items are very small - too small to use for designs.
16.6 runs just fine all icons are scaled appropriately for the resolution as seen in the pic.
Resolution is 3840x216 and it is scaled appropriately windows 10. Is there a way to change the settings in 17.2?
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Orcad Capture ver 17.2
Hi,
If I have Orcad capture schematic ver 17.2, can others open it with 16.6?
Thanks,
Regards,
TiBo
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Graphic Issues Open-GL ?
All,
I have experienced many times that in certain Zoom-levels, wires and/or texts disappear.
The display settings that I use is that I prefer hollow traces and pads, and it seems that Open-GL cannot properly handle the graphic elements in some magnifications.
This happends with both professional boards like Nvidia Quadro and "Gaming" boards like GTX.
Has anyone else experienced this?
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How to add footprint in Orcad Capture for Custom made parts in custom library?
Hi,
I have problem in creating footprints for which I created custom parts in my custom library. How can I create footprints for that custom parts and assign them to particular parts?
Help me on this.
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arcs converted to line segments during gerber export
So I'm using Allegro 17.2 and have a contoured board outline with several arcs, some that are more of a small radius and others that are a long gentle. I'm trying to create my gerbers but when I do a number of the arcs become straight lines, totally messing up my design. Any help would be appreciated. I've attached a screenshot of the board design (left) next to the gerber export (right).
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Can't move pin number ?????
Greetings,
I am making a foot print of 289 pin chip. After instantiating the array of pins it seems the pin number can only be moved ONCE! After changing the text and placing the pin number inside the circular pin, it doesn't allow me to
move it again. When I try to just select the pin number text it selects the whole pin.
Thanks for any suggestion.
Cheng
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