Curious to know why the test point NC drill exports in english units even with the NC parameters specifies metric?
Also not a fan of having to use separate test point pads for top and bottom test points as opposed to just using an SMD pad and mirroring to the bottom. Seems like this could be made much better
Hi,
I have an issue with capture 17.2 base release and current ISR 031 running on windows 10 pro. What is going on is the screen refresh is slow when
capture is running. When capture loads it seems like you can see the tool bar icons getting drawn on the window, then they refresh and appear.
Moving Capture tool bar Icons across the screen has the effect of huge mouse trails on the canvas. The PCB editor works fine, Display is very fast.
I tested capture v17.2 on windows server 2008 R2 and it works well.
Things I tried.
Re-Install
Checked Licensing - No issues found
Verified graphics card drivers were fine - Checked ok PCB editor is really fast.
Checked windows logging etc - Nothing found.
Ran capture as an admin - Made no difference.
Disabled Firewall and anti virus software - Made no difference.
The issue seems to be related to win 10 Pro as things work fine on winserver 2008. I will do some more checking but in the mean time
if anyone has any pointers, that would be a big help.
Thanks Paul.
Hi,
Is it possible to convert/import my OrCAD Layout Plus *.max files over to the Allegro 17.2 *.brd? I do not have SPB 16.3. 16.5 or 16.6 versions installed. I do have a SPB 16.2 version installed if that is of any help.
CT
I've finished my layout, and have 5 errors left I can't seem to fix. I can't get my traces to snap to the origin of the pads. I've tried several times, but the traces still don't completely finish an error free connection. Is there something I'm missing?
I have board layout in allegro 16.2.I want to add smd flying probe(test point) on through hole via at bottom side of pcb.Please suggest.
I have a board route in allegro 16.2. Now i want to fill balance copper in top and bottom layer?
When I try to import Eagle PCB into OrCAD PCB 17.2 a error message is displayed in the command window " E- *Error* eval: undefined function - _ns_create_eagleform "
Help me in resolving this issue.
i recently processed a third party design, the "min pad size" for test points was set at 0.034", unfortunately there were vias selected as test points that met this rule but the solder mask opening was smaller, <0.034", is there an audit or parameter that will flag a violation if the solder mask opening is smaller than the "min pad size" for vias, pth pins and smd pins
Hi all,
I have a problem with board and i have a little time.
I need to convert a file MAX (PCB layout) to file .brd (PCB Editor 17.2) and It's ok. After the conversion iI used dbdoctor.
In output It seem ok but I have a footprint is incomplete. Unfortunately this footprint is very complicated with a lot pads. To made again a new the footprint I have to spend a lot of time. Someone to know another method for have the footprint complete?
Thanks and happy new year!
We recently replaced our Access database with a SQL database. We are reusing schematics that were linked to the old database. I now need to link them to the new dB because we are no longer supporting the old dB.
Is there a quicker way to link all of the parts other than using Part Manager/Link database part for each individual part number?
Thanks
Good morning,
we recently upgraded our license from Allegro 16.4 to 17.2 and I am familiarizing with the new UI.
I cannot find the impedance calculator tool that used to be in the cross section editor.
In the old version, we had something like shown in this video (min 3.58): the two check boxes allowed to show the single ended and differential impedance calculator.
In the new version all I can see is the window in the attached picture, and no option to calculate the impedance.
I have tried to switch the editor, enabling all the available packages (high speed, Analog/RF, Design Planning) but still no luck.
The curios thing is that on this other video the option seems to be there.
Am I missing something? Is this feature now part of a different license/package?
Any help would be appreciated.
Paolo
Using Concept, on a hierarchical design is it possible to generate a report that details components used per page within a block?
I know PHY_PAGE will list the page number within a block but not actually give the block detail i.e. CORE, FPGA, POWER etc.
The report I am looking to generate would look like the following:
REF DES HIERARCHICAL BLOCK PHY_PAGE PART_NAME DEVICE_TYPE
Thank you in advance for any help.
Folks,
I am working with a PCB bureau that uses Allegro 17.2. I was the one that originated the design schematic in Allegro Capture 17.2. The PCB bureau uses different symbol/PCB Footprint names than I did for the PCB Footprints. I have the bureau's footprint listing, but rather than go through component-by-component in properties, is there a simple to "Find" and "Replace" all PCB Footprint names in any given schematic so that the bureau and I are synchronized on the PCB Footprints?
CT
I'm trying to define a set of "Inter Layer" checks that I can use for our flex and rigid flex designs and noticed that I cannot set up a check for items that are on the same subclass. Maybe that is not the intention of these checks, but it seems like it would a little more useful if you could do this. As an example, I'm trying to define a check that would ensure two stiffeners, added to a flex circuit on the same side, are not too close to each other.
Is anyone aware of a way to automate this check using the Inter Layer table of checks? Maybe another way?
Thanks in advance,
Scott
I've used replicate in the past quite a bit. I loved it. Makes quick work of duplicated circuits. I was using it today and noticed that it's grabbing planes and vias that aren't even turned on. The vias and planes are electrically connected to the circuit, but I think it should be grabbing only what I select. Am I missing something? This obviously isn't a problem when you are initially placing parts, but I'm pretty sure I've done this before with nearly completed designs and it didn't behave like this.
Dear Support,
I have a question on how to short a net and a shape on different layers using the NET_SHORT property.
In my schematic I have the situation below:
PGND is the orange shape on L3 and AGND are the two nets connected to the two VIAS.
Using the NET_SHORT property on the two 2:3 VIA I was able to have them connected to the shape.
However, it still seems to be missing the connectivity between the two VIAS that should be provided by the PGND shape.
Is there any way to prevent this?
Thanks a llot
Francesco
Is there a way to track the time an allegro file has been worked on with in the tool?
Hi, I have a couple of issues with exporting gerber data from Orcad/Allegro PCB Editor (16.6) & (17.2)
My first issue pertains to exporting the gerber files in a standard 2:3 Format. I work in mils and trying many combinations of database accuracy I have found no
way to export in 2:3 positional format. I am wondering if it is even possible ?
Looking in the help file 2:3 does appear to be supported.
I keep getting a dialog box popping up saying. ( For Raster Artwork Formats Accuracy must be at least one greater than the database accuracy)
If my database accuracy is set to 0,1,2 etc I can export without issue using a 2:5 Format but not 2:3
My second issue pertains to the actual syntax of the generated Gerber file. I have a commercial CNC mill that I use for quick RF Proto type boards. Basically
the software used with the mill converts the Gerber data to G-Code. That mill software works without issue with many different cad packages that create
Gerber files including Altiumn, P-Cad, Mentor etc. It also works with Gerber editors such as cam350 etc. Using the native RS274X data exported from Orcad
PCB editor results in un-usable data.
In checking the Gerber export syntax from Orcad/Allegro I have isolated the issue. Here are the details.
Opening the Gerber file in a text editor shows the following after the GO4 statements in the Header of the file.
G04 ================== end FILE IDENTIFICATION RECORD ====================*
%FSLAX25Y25*MOIN*% <<<<<<< Issue I with this line
The first line ( %FSLAX25Y25*MOIN*% ) indicates that the format of the Gerber file is 2:5 and that the units are in inch.
In looking at the Gerber specification and other Gerber output from various cad packages It looks like Cadence has combined this line into one. Normally it should read like this.
Or should I say the other tools I have put the info out like this.
%FSLAX25Y25*%
%MOIN*%
As you can see there are two separate lines. One indicating the Format & one indicating the Units. If I edit the cadence gerber file to look like this then my CNC package has
no issues reading the data.
My question. Is there a template fle available that I can edit so that cadence puts out RS274X gerber in the above syntax ? just like other cad tools.
Thanks Paul.
I'm trying to find out how to rotate a block of components in Orcad pcb. There seems to be no results when I search the website. If I Highlight and move all components then do a rotate, the individual components rotate about themselves which is not what I want - any help appreciated.
I'm totally finished my design, and have been asked by my customer to add their part number to my assembly drawing. None of my parts in my layout have a text field to support it. I assume I need to revise my library parts to support receiving a new netlist with the correct customer part number.
My question is, how do I set up the schematic and layout parts in order for the schematic customer part number (that field is called "CUST_PN" in the schematic)? Do I simply add a text field to my layout part with a matching text field, and place it on the "User Part Number" and on "Assembly_Top" layer?