Hi
I'm new to OrCAD and when I was messing around I decided to click the change to legacy UI (requires restart) and it worked but now I can't find where anything is so how do I change it back from the legacy UI in 17.2 to the ...new? UI
Thanks
Chris
Hi
I'm new to OrCAD and when I was messing around I decided to click the change to legacy UI (requires restart) and it worked but now I can't find where anything is so how do I change it back from the legacy UI in 17.2 to the ...new? UI
Thanks
Chris
Is there a way to export copper, solder mask and other features from Allegro that will import smoothly into CREO (Pro-E)? EMD, IDF, IDX see to be only 3D data. A STEP file seems to have all of the info we need, but it takes a day or so to actually import into CREO. There has to be a better way.
Thanks
Hi guys.
In the picture below I have a shape. The shape was drawn on a 100 mil grid. I changed the grid to 50 mils. What I am trying to do is select the shape and then pick the bottom right hand corner of the shape and simply slide it over to the tip of the arrow you see in the picture. When I try to do this the shape is still snapping to the prior 100 mil grid. It is not snapping to the new 50 mil grid.
I can do a move based on Shape center snapping but I don't want to do that because sometimes the shape geometry is not a simple square or rectangle. I just want to move it to the next grid point based on my current grid setting.
Any clues would be helpful. I'm running 16.6 & 17x latest cuts of SW. Seems like the krux is that the shape is remembering that it was created on a 100mil grid and doesn't realize that the grid has changed.
Thanks....... Paul.
The company I work for does not create many designs. We do however have two seats of OrCad capture and PCB designer. Currently, designs are stashed on the network in some folder. If the PCB guy dies or quits, It'll be hard to find his design files. We make many more mechanical assemblies than electrical and use Autodesk inventor as the solid modeling and drafting software and use Autodesk Vault as the project management and revision control software.
Supposedly we can stick the any file type we want into a folder in Vault, but having native support would be ideal. Does anyone know if a Vault Plugin was created for Orcad files?
Or... can anyone recommend a software for managing the PCB designs and versions? I'm talking about Product Lifecycle Management software. Software that does version control, engineering change management,
I do already know about OrCAD Data management. If this is what you were going to recommend, would it be overkill for just two seats of Orcad?
Thanks in advance.
Neil
Exporting layer 1 copper to DXF, I have several ground voids (it is an RF design) but they show up filled with copper in DXF.
I am creating PCB in Allegro PCB designer 16.2.. While putting ground or +5V plane, it is getting shorted.. Clearances mentioned in CM are not getting considered. Further, I am not getting "shape fill" enabled under Options. (image attached). Please help.
Hi Group,
Could anyone help me out to solve the mystery that why IR DROP result is change by simulating path resistance and multiply it by current.
I'm trying to find out how to add a note to a Padstack so it is displayed in the Notes column of the Drill Table in the Manufacturing Drawing. We are using Cadence Allegro 16.6
I have a Via which needs to be Filled and Capped and need to distinguish these from the other vias on the board, the Drill Table has a Notes Column but I can't see where the information for this column comes from
Any advice appreciated
Thanks
I want to use an RJ45 connector which requires a board cutout like this one Molex 1116503-2. It requires a board cutout like this:
I am playing around with some preliminary planning of component placement on my PCB. Is there a way to set up the dra/psm file of the component so that the PCB outline will be updated based on its placement? Right now the PCB is basically rectangular. My only plan as of now is to play around until I am happy with the placement, and then cut out at the end... But given the somewhat complex shape, it would make changing anything a nightmare.
Thanks.
Hi! How can I obtain the actual physical length of a bondwire in Allegro PCB Editor? The ruler tool just gives me the 2D distance between its extreme points :\
Thanks and regards, Jorge.
Hello,
Please help to migrate SDA design to EDM environment.
Hi,
I am using orcad PCB 17.2 version, my system is the client PC and i access the server over the network for the license. When is login as administrator in my PC the tool works fine.
But when i login to my PC as User, there is always a licensing issue which pops up(License not found).
This issue is only with few PC, the rest are working fine. What might be the issue.
Kindly help me resolve this issue.
Regards,
Chadga
I am doing a impedance based routing, where i have set the impedance for a Cline to be 60 ohm. Once the routing is started the it routes with the line width based on the impedance given specified. If I add a via in between and Cline enters the inner layers then
I'm having trouble getting Allegro to report a DRC for a micro-via (L1-L2) stacked over a buried via (L2-LX). It will report as a DRC until the center of the micro-via crosses the outer pads edge of the buried via.
We have a layout that is complete, but the footprints need to be changed to the alt_symbols called out in Orcad. Importing the netlist as usual leaves the existing footprints as they are. How can we tell it to replace the footprints with the alt_symbol without having to start all over with component placement? Thanks for any advice you can offer.
Orcad PCB Editor v17.2-2016. Fails to output STEP file with error
E- (SPMHGE-268: step out had errors, use Viewlog to review the log file.
E- A problem occurred, check the logfile using Viewlog
There are no entries in the log file, when I try to view with Viewlog. Can't debug the error?
We have an eDfM who wants an excel spreadsheet filled out for every Design Rule and compliance with these rules. This creates hundreds of thousands of rules to check on a 12 layer design!
Is it possible to output each design rule and the value of the checks done (IE each pad tested and the minimum clearance value actually found) instead of just reporting that the DRC has zero errors?
If this is possible, how would it be done? Can a report be created in Cadence Allegro 16.6?
I'm trying to write a console command script in Concept HDL 17.2. The idea is that I want to paint all components that have a specific value in a certain property one color, and paint all other components another color. Here is what I have so far.
set nextgroup A
find <property_name>=*
paint <color> A
set nextgroup A
find <property_name>=<property_value>
paint <color> A
The problem here though is that this paints the properties themselves. I am trying to paint the bodies that the properties correspond to.
Is there a way to do this through the console command? If not, is there an alternative way through something like SKILL or a tool within Concept HDL?
Is this possible? If so, how do I go about doing it? I thought there was an option in a previous revision to separate the drills.
Thanks
Greetings,
I am trying to make a 'c' shaped pad, per the manufacturer's recommendation. (https://www.fairchildsemi.com/datasheets/LL/LL4148.pdf)
For some reason, even when I put the origin of the custom shape in the middle of the vertical section of the shape (blue plus), padstack editor shifts the origin of the pad to the center between the top and bottom of the 'c' (red plus).
The problem is that when I place the pad this creates into a package symbol and then into a PCB design, the copper traces want to connect to the origin of the pad where there is no copper.
Any help with this would be very appreciated.
Thanks,
Tyler D