I am wanting to make some non plated through holes for mounting a PCB into an enclosure. I only see people giving advice about using basically the mechanical hole but set it to non-plated. That is fine to do but what is the difference between the pad types mentioned in the title? I would imagine that the mounting hole should be used but is there a significant difference?
I am a user of version 17.2.
Hello,
I am going for PCB array manufacturing in order to save costs. I have totally designed 3 different files and i want to combine each of them side by side.
Can somebody tell me the steps in achieving this?
I am using Allegro 16.6V
Thank you,
Hello,
I am working with a 4 layer board and trying to generate the gerber files required for fab. I am having issues with generating the artwork for my GND layer. It gives me the following error:
"ERROR: aborting film - Layer polarity of layer ETCH/L2_GND does not
match film polarity of Positive. DRC may be unreliable."
I tried various ways to fix that first, but it didn't work. Now I am trying to delete that layer and create a new one but it also doesn't let me delete that saying the following, even though I deleted the copper pour from that layer and there are no elements left on that layer.
"Layer being deleted: ETCH/L2_GND
(-5802.437 -1990.874) TEXT LINE: L2 Gnd
(-5802.437 -1990.874) TEXT: L2 Gnd
(1220.232 2564.340) DYNAMIC SHAPE: Gnd, Boundary/L2_Gnd
(1008.084 2352.192) SHAPE(auto-generated): Gnd, Etch/L2_Gnd "
Can anybody please lend me some help or direct me to the solution, I am very lost at this point. Any help would be really appreciated!
Hi All,
Is there a way to extract the library symbols from the design cache in OrCAD Capture? I tried to modify a part but it looks like it will not let me because it cannot find a corresponding library entry. I inherited a design file that does not have any library files.
When you are making a schematic symbol, is there a way to edit multiple pins to change their properties? For example, say I have 25 pins that have a shape of line but I want to change them all to short or zero length. I have only been able to only select one at a time to change them individually. It takes a while to change multiple pins that way. In other programs like EAGLE and Altium, they have the ability to make many quick changes. EAGLE can allow you to select a change tool and you can just click on the ones you want changed and then they change and Altium allows you to select as many objects that are the same and you can change them all with a simple selection to the new type. Does OrCAD have anything like this?
I updated to latest hotfix S060 and for installed version shows-undefined000, any idea why this doesn't work?
I am building a circuit using op amps in pspice. The op amp layout in pspice is what you would expect, the little triangle representing one (1) op amp. However, the components I will be using to actually build the op amp are two (2) op amps on one single 8-pin DIP chip. when I try to create the PCB it is representing each op amp as its own chip. How do I combine the op amps to represent one 8-pin DIP when I am trying to build the PCB?
I want to export PDF using the PDF export from File drop down. This works fine when I have just the base 17.2 version installed. Any idea how to fix?
SERVER ERROR:orPrmRequestDispatcher_executeLocal: Server method failed - Internal Server Error
Hello everyone,
Lately I have met some troubles while trying the soldermask design rules check function of Allegro 16.6
When I check the "soldermask to pad and cline" rule, it will report DRC errors when vias are on "package soldermask".
When it comes to the "soldermask to shape" rule, it will report DRC errors when shapes and "package soldermask" are too close, even they are on a same net.
Both these two conditions are quite common on my board, and they don't actually break my design rule, how can I avoid these DRC warnings?
Thank you!
Hello all,
I have designed a schematic in Orcad capture cis and i have created its netlist and imported it from PCB editor. I have successfully placed all components. But issue is if i am making some changes in schematic its not reflected in My Board design and and if i regenerate netlist whole of my board design vanishes.So what to do? Please help? How to update the changes of schematic on my board?.
I tried with
In Orcad CIS Capture
option> Preferences>Miscellaneous>Intertool communication>Enable Intertool communication
In PCB editor
Place>Interactive
but it is giving error : E- (SPMHGE-457): Error see the logfile.
And in logfile i am getting like this
Algorithm : IC Place within: board Map grid points to: library origin Place leftovers on bottom: YES Allow component overlap: NO Soft boundary: NO Cluster: NO No Rat: NO Remove TAG: NO Components at rotation of 0 degrees are weighted 50 Components at rotation of 90 degrees are weighted 0 Components at rotation of 180 degrees are weighted 0 Components at rotation of 270 degrees are weighted 0 Board direction of north is weighted 50 Board direction of east is weighted 50 Board direction of south is weighted 50 Board direction of west is weighted 50 Component mirroring weight is 50 Component straightness weight is 50 Warning: unplaced components are not PLACE TAGGED. Error: No Package Keepin was found ERROR(SPMHGE-458): Error see the message(s) above.
What is this error SPMHGE-458 error?
So i am not able to figure it out what is the issue?
Please help me out its urgent?
Hello all,
I am having some difficulties in updating a PCB from a schematic. I am relatively new to OrCAD and inherited a design that I updated the schematic by removing a few components and changing some of the nets around. I followed the tutorials and help from other posts from this forum: https://community.cadence.com/cadence_technology_forums/f/pcb-design/36492/import-schematic-change-on-pcb and https://community.cadence.com/cadence_technology_forums/f/pcb-design/31331/update-pcb-from-schematic.
Here is the Create Netlist dialog box:
The result of running the Create Netlist does not remove any of the components from the PCB. How is this process supposed to work?
Hello!
I tried to convert Altium Designer schematic into Cadence Capture CIS. I followed the help document step by step, but it failed when I clicked the Translate button like the picture below. The file was converted to ASCII file. Is that a version problem or something wrong with the installation and license?
Hi,
I'm having some issues trying to set up linking with a postgreSQL database. We're migrating from an Microsoft SQL to postgreSQL database. Here's a snippet from the error when I open up 'place database part' when linked to a postgre database..
ODBC Error Description: State:42703,Native:1,Origin:
SELECT DISTINCT Category FROM view_capacitors ORDER BY Category
ERROR(ORCIS-6245): Database Operation Failed
Please Check Session For More Details
ERROR(ORCIS-6250): ODBC Error Code: -1
Description: ERROR: column "category" does not exist;
Error while executing the query
What's confusing: After opening, if i switch to a SQL Configuration DBC file, then switch back to the PostreSQL DBC file, the queries seem to work as indicated. This seems to work fine until the program is closed and reopened. Here's some related pictures regarding the setup:
Some other notes which might help:
- PostgreSQL ODBC driver is 12.0.0, 32-bit. I am able to connect to server without issue via driver test.
- We're running OrCAD Capture CIS 16.6-S062 (v16.6-112FF). Yeah it's a bit old....
- Windows 10 Pro, 10.01.18362 Build 18362
Any help with this would be much appreciated.
Thanks in advance,
George
Importing a newly created netlist from CIS, I'm now getting these 'old' DEVICE FILE messages:
Note: MFG_PN property definition created
#1 ERROR(SPMHNI-176): Device library error detected.ERROR(SPMHNI-189): Problems with the name of device 'TESTPOINT5_0.125" DIA X 0.320"_1': 'Name is too long.'.Note: PACKAGE property definition createdERROR(SPMHNI-170): Device 'TESTPOINT5_0.125" DIA X 0.320"_' has library errors. Unable to transfer to Allegro.#2 ERROR(SPMHNI-176): Device library error detected.ERROR(SPMHNI-189): Problems with the name of device 'TESTPOINT5_0.125 DIA X 0.320 L_1': 'Name is too long.'.ERROR(SPMHNI-170): Device 'TESTPOINT5_0.125 DIA X 0.320 L_' has library errors. Unable to transfer to Allegro.
I'm not aware of specifying the DEVICE information any longer, but this is now raising its UGLY HEAD.
Any help is appreciated.
Just downloaded it but don't have the time to install and test. Anyone tried it out? What's new about it that you like?
We print silkscreen for components, as much as possible, at every board release. During development, it's common for us to remove the ref des when things are too tight. Then later there may be more room due to the design evolving. In those cases, we want to restore the silk ref des on the affected parts.
I found https://community.cadence.com/cadence_technology_forums/f/pcb-design/34467/find-missing-silkscreen-refdes-on-board-design which help to identify missing silk. I wrote a SKILL program that searches through the DB, identifies those missing assembly or silk ref des text, and then adds it.
Why didn't I want to use Place > Update Symbols or axlRefreshSymbol()? Because those operate on all instance of a footprint at once. So they can restore missing silk text, which is good, but silk text locations are reset as well which is not good.
I thought about updating my utility to try and get around this. The steps I think are involved are:
That seemed painful to the point that I felt there must be a better way.
In addition, silk was added to footprints which have a ref des but didn't need it in silk. Think of manufacturing components like fiducials.
Lastly, I can't be sure there are multiple instances of the same footprint on the board or that their silk text size is the default one. So I have to make a guess about the library's text size, or query the library (which I don't know how to do now). Another annoyance.
Is there a way to refresh a single footprint? (I assume I can extend this to a subset of all footprints relatively easily.) Are the steps above I listed the best (or only) way to do this right now? Or is there a better way?
Hi everyone! I'm working on a small battery powered PCB which will fit inside a small plastic "hockey puck" container. A number of these "pucks" will be sold together with a "charging doc" which will store and charge the pucks when not in use.
I'm trying to work out the best way to charge the battery. I'm thinking of having metal "pads" on the puck that pass through the puck's plastic shell and then make contact with the PCB on the inside, and having a similar system on the charging dock. I'm thinking of having SMD "contact sprints" mounted to the underside of the PCB and have these mate against metal pins that protrude through the puck, but it's the later of which I'm struggling to find. For a visual, think about "restaurant pagers" and how they charge.
Hello all,
I had an issue one time where I changed the directory of a padstack that was already attached to a pin in a package drawing. When the symbol was added to the board, there was a message that it cannot find the padstack. Is there anyway of making the Properties attached to Padstack: LIBRARY_PATH to be relative? Here is an image to illustrate what I am talking about:
I guess this would be good to know if you want to share drawing symbols.
Hello
We're using Place replicate for providing identical components with equally identical copper cooling pads.
This works out okay. However, any time we assign a replicate module to a component, we are forced to position and rotate the newly created group. For a few components this would be nothing to worry about. For several hundred single components on a PCB, it becames more a chore...
We've noticed that components tied to a replicate module is member of a MODULE group:
Member of groups:
MODULE : CR_LEDCOOL_25
Is there any way we could simply assign components to a module group in one click and then use Place replicate update to give all components their cooling pads where they are?