My board file have fpga and dac signals which needs EMI simulation I have uploaded the IBIS file of virtex5 fpga in the speed2000 tool for EMI simulation but the columns of power_clamp, ground_clamp, power and ground are invalid. Also the right stimulus cannot be assigned to the signals. Can anyone please help to overcome this IBIS and stimulus issue for EMI simulation in Speed2000 tool............
Hello!
Does anyone know a simple way to export the Part Manager info in DE HDL? I have a circuit with multiple module blocks and would like to create a master bill of materials for the modules. I see that the Part Manager has all of the information I need to do this, but so far I have been able to extract the data automatically.
Thanks in advance!
Has anyone used Allegro system capture? At the moment I don't have a lot of use for the "system" function. I'm wondering how it works for creating a single board. Only reason I'm asking is because we are looking for solutions to load our designs to Windchill.
We currently use Capture.
Thanks
Good day Engineers,
Hello Sir/ Ma'am,
I'm new into cadence and I'm having difficulties to debug the problem using Allegro PCB Design Entry HDL.
Firstly, I'm using Cadence 17.2 version. I have updated schematic file but when I try to export my ( Input BOARD Files - not updated board ) into my new ( Output Board file - Updated schematic w/ New components added) I'm having errors, these are the error
------ Oversights/Warnings/Errors ------
===========================================================
Start Constraint Diff3 Import
Constraint File: C:/Users/JM/Downloads/15mh/feb27/worklib/ltc/packaged/pstcmdb.dat
Allegro Baseline: C:/Users/JM/AppData/Local/Temp/#Taaaaae74660.tmp
Start time: Thu Feb 27 12:18:27 2020
===========================================================
ERROR: Schematic database has probably been reverted to an earlier version than that, which was used in the latest flow.
The basecopy file generated by the last back-to-front flow not found.
ERROR: Schematic database has probably been reverted to an earlier version than that, which was used in the latest flow.
The basecopy file generated by the last back-to-front flow not found.
ERROR: Schematic supports automatically creating XNets using DML but the Layout will not automatically create any XNets. Change setting in Layout or Schematic, re-generate files, and re-run the flow.
ERROR: Can't import electrical constraint data (pstcmdb.dat)
===========================================================
Finished Constraint Update Time: Thu Feb 27 12:18:27 2020
===========================================================
Much Appreciate.
John
hi iam thiyagu,
I created a heterogenious parts U1A,U1B,U1C and U1D.after completing, i don't know how to change as U1. how to change plz tell me.
Does anyone still have Orcad 1.26 Dos Version Installable Disquettes ?
I only have the pre-installed zip file with only CGA driver...
I wish to re-open my files in hires grafx !
i need at least VGA driver for orcad 1.26 (640x480).
I tried orcad viewers but doesn't work with my old files.
I tried to use driver file from other version on the net, not working either...
I have just some few small drawings I wish to re-redit...
I made a hardcopy print but only have epson fx80 driver with limited quality.
Is it possible to load in some other software to print on laser printer ?
Thanks for any help !
So i have this footrpint where the manufacturer suggests thermal vias under the package as shown in this picture....
I used Ultra librarian to create the footprint for ORCAD. The problem is that it turned each via into a pin though .....
I would like to know if this is the way it is done in ALLEGRO or if there is a better way to place vias under a package footprint?
Hi everyone,
Is there a tool that I can run that tells me fill factor info, including I/O count, current pin density, and board area, etc. ?
Hi,
I lost the Replace Etch option in the Option window when I am in Route mode.
Could you help?
Just happen on this design only, the others are okay.
Thanks,
Regards,
TiBo
Hello,
I want to assign functions to numeric keypad keys.
For example I would like to have "Ctrl+numpad4" create fanout with direction west. "Ctrl+numpad6" fanout with direction east. And so on.
My problem is that I don't know how to name the kaypad keys in the env file?
When I want to assign something to Ctrl+numpad4 how should I write this?
And I want to use this with NumLock enabled so that numeric input works.
Hi
There is only one unrouted net remaining in my design. and i am unable to find it.
I tried setting global visibility to off and then displaying rats all.
It did not help. I do not know maybe it is some via which is unconnected to trace. How can i find it out?
Is there a way to get OrCAD Capture to display a symbol exactly as it was created, complete with the font and font sizes used during symbol creation?
Hi, Iam using Cadence Allegro 17.2 version. I am tried to export pdf from brd file.but it says "No license Found Please Contact your Cadence Sales Support".how to fix it.
Download manager has stopped notifying me of the latest orcad 17.4 hotfixes. In fact the last two hotfixes i have had to go to the download software section of the cadence website to download them
I have the latest version of download manager
Has anyone else experience this problem
When I change a plane on another layer certain vias that are not related change there net name. Is there any way to stop the software from changing the net names on vias ?
On dynamic shapes you can edit properties but the software does not same them. Is there a way to make this work ?
I have tried to downrev form 17.4 to 17.2. I choose Setup-User Preferences-Drawing and choose database_compatibility_mode to 17.2. Then export downrev to 17.2. When I tried to open design in 17.2 it still shows it designed from 17.4 so cannot opened design. I wonder if my operation is correct and how can I convert 17.4 edtion to 17.2 edtion?
I have a design with several power planes and for some reason the planes are shown as solid, like everything is poured over but I don't get any connectivity errors. I am fairly certain that it displayed correctly at one time but I have no idea how to get back to that. When I run the negative plane Gerbers they look correct.
Another issue is that I have the thermal relief connects set to Orthogonal for Thru pins but they flood over on the split planes. I defined an thermal relief pad and antipad for each pin. I also have the clearance set to DRC.
I have PCB Pro 17.4.
I really appreciate any help!
How do I make a 2 pin component who's sole function is to short pin1 and pin2 together without DRCs?
I would like to make the overall outline to be small enough to fit in between the 2 pads of a 0201 resistor/capacitor.
Hello,
My PCB color views perfectly file, but when I generate the Gerber files, (.art) they are totally different with color view files.
for example, my top layer view in the .art files is shows full component and paths, where my color view is only the paths and through hols.
please see the pictures of the .color and .art file in the w link.
https://home.mycloud.com/action/share/8effc146-56b5-4bc1-8704-935dc1518b28
Thank you for your help in advance.