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Orcad Capture 16.6, left click to select component stops working

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After adding the 'CYSTAL/SM' component from the DISCRETE library I can no longer select that component or any compoent by left clicking it. 

Other components can be selected by left clicking a box around them *IF they have a wire connected. 

What is going on? 

How do I get OrCAD to stop going into this state?

Closing and re-opening fixes the issue but only for a little bit. 

Please Advise.


In Allegro17.4,The reset UI to all toolbars option cannot be saved after restarting the software

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In Allegro17.4, The "reset UI to all toolbars option" cannot be saved after restarting the software

How can I stack the LEDs (diodes) at equal spacing in same line?

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I would like to place the diodes in the layout as follows (Image from the reference board file):

All the 9 diodes are aligned horizontally at a pitch of 60 mil. Now I have been trying to achieve the same in my design manually. I believe there must be an option to do as automatic in PCB editor. Please advice

In Capture 17.4 HF009, The OK and cancel options of the dialog box cannot be displayed normally

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Under the resolution of 1366 * 768 computer screen, 

some dialog boxes,The OK and cancel options of the dialog box cannot be displayed normally

 There are other pages that are not completely displayed

In Capture 17.4 HF009 show footprint,zoom in zoom out and zoom fit button doesn't work

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In Capture 17.4 HF009 show footprint,zoom in zoom out and zoom fit button doesn't work

PCB Editor Total Length Constraint Not Matching Pop-Up Display

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I'm in the process of routing some DDR4 devices in a fly-by topology which requires trace length matching to the first device then each device in the series. To accomplish this, I am trying to use the Constraint Manager's "Total Etch Length" CSet. I've created a CSet with a minimum etch length of 2485 and a maximum etch length of 2505 to the first device. I can set this to my net class (which are all currently less than the maximum), but when I go to adjust length and tune, the pop-up window shows the net exceeding the maximum etch length setting. Based on the settings and total length, it should be under the maximum.

My plan is to trace match to the first device destination, then adjust the trace lengths to the second, and so on...

See my screenshots below with the net D1_MACT_B as an example

I have a feeling it has something to do with the "Unrouted Net Length". How do I properly set a constraint to measure the actual "Total Etch Length"? 

My tool set is Orcad PCB Designer Professional 17.4-2019 S007.

can't route differential net

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HI, last year, after I set up differential pair and went to route it, the two line would go together with one click.

this year I changed a new computer and do the same thing, I setup the differential pair in constraint manager, and everything shows OK.I can see the setup pairs are right there in the constraint window, but when I begin to do the routing, the pair can't go together, they still like single routes, I mean one click can pick up only one net, not the pair together.

I opened the old board file which works fine on my old computer, it works good on my new PC. so do I missed something before setup the differential pair?.  

anyone can help?

cadence 16.1

Thanks

Cadence License Issue

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Hi everyone,

When I switch from 17.2 to 16.6, candence 16.6 has inform:" No product license found, exiting..." However, I can use 16.6 before I change to 17.2.

Please give me some ideas if you used to get this issue.

For some details: We have 3 versions of Cadence including: 16.6, 17.2 and 17.4, using network license.

Thanks,

Khang


Bottom Up Hierarchical Design

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I was reading through Cadence tutorial on how to create a bottom up design i.e. starting with low level board schematic then creating a higher level schematic, however I'm not able to do this properly. What ends up happening is that I  create a single hierarchy branch, with all my schematic pages below it. 

I have my complete schematic where I have everything my board will be using microprocessor (MP), DRAM, Flash etc. and I want to create 2 blocks: 'CPU' (containing the MP circuitry) and 'MEMORY' (with DRAM and Flash circuitry).
How can I create these individual symbols and include them all as blocks on the higher level diagram, after I completed my schematic?

Hiding pins in PDF export

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Is it possible to not display certain pins in a pdf export (not referring to plot-pdf)? PDF export does not plot highlighted features using the highlighted color.

I have a bunch of random "ground/return) pins that are causing confusion with my assembly drawing. They aren't actual pins, and aren't really needed, but were added to the schematic anyway. I don't want to go back and modify the schematic now.  I've been moving them away from the ref designators, but I'd like to not display them at all. If I use plot-pdf I can highlight all of the ground pins (white) and they won't be shown, but using plot-pdf I can't show the traces because it get's cluttered and the resolution is terrible. 

This is a wire bond assembly drawing.

Why some components seems as selected always in PCB Editor?

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Why the following resistors shows different colors?

This is the snap of the board when it opens. Here few resistors look in different colors (this is the color change observed when selecting the component to move around). But I have not selected any component and this is the default look when open the PCB file. What could be the reason for it?

PCB version - 17.2

Part Editor in Capture 17.4 S009

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Hello every body,

I have a question regarding moving of pins in the part editor. How is it possible to move more then one pin at once?
If the pins are selected at once the moving is not possible. Only if pins selected by click the moving is possible.

Thanks

how to set soldermask on clines

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If we want to set soldermask window on an area, we can simply add a soldermask shape on it. but how to set soldermask window on curved cline?

Thanks

connecting to odd shape pad

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I am trying to connect to the ground pin on the Rosenberger 19S101-40ML5 SMO connector shown in the image. I have created the footprint using shape symbols. Now, the center of the GND pin is not metalized. I want to connect the GND VIA to one edge (top edge here) of the GND pin. How do i do that? I can recenter the shape symbol so that the center falls at the center of the metalized portion on the top edge, but then if i want to connect to the left or right edges in another instance i have to recreate the symbol with a different shape symbol (center of the pin moved again), i guess. Is there a straight forward way to do this in OrCAD, so that i can just snap to any metalized part of a pin?

How to see the Command on the session log vane when I hit the command button?

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Hi all,

I'd like to create shortcut so I need to know the command information when I click the button.

but I forgot the way to see the command log when I hit the command button

in my memory, I input something command on the command vane...

regards,


what is major difference between "Symphony Team Design" option and "PCB Team Design" on Allegro PCB Designer?

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Hello everybody!

I am looking for the co-work design option at allegro PCB Designer.

and I found there were two options below.

but I don't know which kind of difference they have

if you know about these options

please explain for me.

regards,

Rotating elements in the shape of a circle

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Hello everyone. 

I want to create a PCB in the shape of a semicircle and I want to place LEDs on the edge of the PCB. The problem is that I use side-view LEDs. How can I easily place the to make sure that all of them are headed up. I have 150 LEDs. Is there any easy way out there to do it without worrying about the angle of each diode?

Allegro unrouted net for adjacent pins change to simple straight connections

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Hello

In Allegro 17.2, when the unrouted nets are on adjacent pins, the connection exits the IC from one pin and goes back to the adjacent pin in a complicated pattern. Is it possible to have a straight connection instead?

Frank

How to solve the via shorting issue?

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One of the via showing an unintended connection to GND plane. Please see the following picture.

My intention is to disconnect this via from GND plane and connect it to VDD_CORE plane. I have tried to delete and create a new via, still via is connecting to GND. How to fix this issue? 

PCB Designer version - 17.2

 

EDIT


I understand that "Assign net to via" is an option to change the via net property. When I try for that option, it is not available for me.!!

OrCAD/Allegro 17.4 (SPB174) HF009-Set up or Configure Allegro EDM Servers

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Hello,

Recently we are working on installing OrCAD/Allegro 17.4 (SPB174)  HF009 (before we used 17.2 HF63), just installed software, plan to set up EDM server in a new HW,  we tried what we did when in 17.2 like this:

F:\Cadence\SPB_17.4\conf>conf

"Base Directory set to F:\Cadence\SPB_17.4"

Aug 23 2020 09:48:18,592 INFO  com.cadence.adw.conf.Conf  [] - Server Setup is moved to Element, not picking any server settings here

In pop up window, only two menus "Set up or Manage Company & Site" and "Set up Client", not see that "Set up or Configure Allegro EDM Servers" which we use to set up or configure a EDM server.  Not quite understand what does it mean "Server Setup is moved to Element" and how we can set up EDM server in 17.4

Does anyone has the knowledge/experience?  and any documentation for these configuration for 17.4? 

Thanks in advance!

Xiaojun

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