For a typical installation of OrCAD PCB Designer, what would the paths be for devpath, interfacepath, miscpath, modulepath, padpath, parampath, psmpath, techpath, topology_template_path?
My current installation doesn't have any of these paths set, for some reason, so PCB Designer starts looking for padstacks in C:/Windows/System32
I get the error in the Subject line when I try to change my paths; I have tried running the program as administrator. Is there another way to do this?
Thanks,
-Travis
I cannot delete a void in my 16.5 design and it is preventing me from changing a shape. I have tried deleting the shape and importing a new one from a dxf file and still no good.
Any suggestions?
Hi,
Capture shows green circles next to each connector or test point
(single pin connector) because there is no PSpice model for that. It's
fare, PSpice runs anyway. Now, the diagram looks like a fied of greens because there are many
test points and connectors. Is there such a thing as a PSpice dummy
model so that it could be related to test points an connectors?
Thanks
Martins
Hi,
I am using orcad 9.2 version, i need your help for making layout for PCB with gerber file.
so far schematic is created in capture, the netlist is created showing lots of error with taht schematic. For testing i have made another small circuit showing no error while netlist but in layout plus showing no lib found but i have insatlled it or should i add more...
please help me here is my schematic pls change .DSN(no option for uploading file?)
http://www.fileswap.com/dl/7HWWL6XyD/
Thanks
Hello,
I am using a circuit which runs at 105khz - 250khz in sweep analysis, i want my ac voltage to be converted to dc via a bridge rectifier. as normal diodes don't work well at these frequencies i opted for schottky diodes, can anybody please suggest me which diode to use. my requirement is 40v, 1a. I don't find schottky in the basic pspice library.
Unaware I was in the wrong forum, I've been posting this PCB layout question in the Digital Implementation forum
http://www.cadence.com/Community/forums/p/23378/1322026.aspx#1322026
I am trying to take a group of pre-selected vias and change the net that they are on. My inquiry is as follows:
Apparently you have to be in General Edit mode to select a via without automatically starting a Cline from it, so I am in General Edit Mode
I select the via, then go to the menus and select Edit > Change The only things in the Options panel that I can change are: Class, Subclass, Act via, Line Width, Text Block, and Text Just
There is no net option to select a net for the via to change to. I'm sure I'm missing something but I don't know what. I simply want to take a group of selected etch objects (for example several vias) and change the net that they are on to another net.
If I draw a track from a via with no net, it will assign itself to the net of the destination pin, but I'd like to be able to take a group of vias and either assign a net, or change the net that they're on in one step. Any clarification would be appreciated
Thanks in advance for any insight
Hi
I am anew user oforcadpcbandwould like to knowifit is possible tominimizethe length of theratsnestduringthe placementof a component andnot after it isplaced.
Thanks
Thanks for the tips Kari, but I am still missing something
Can you tell me how to interpret the lingo such as what you wrote "editSelectVia -nets oldNet"
Does this mean to type a command in the command line? Or does this mean to use the menus? Is there somewhere else I should be putting this text string? I ask because I've seen that type of terminology on these boards and it's unclear to me how to interpret.
If I am in etch Edit mode I cannot select the via without a trace, excuse me "Cline", being started from it. In general edit mode I have to pre-select the via, as any attempt at using the menus Edit > Change will gray out the vias in the Find filter. I'd appreciate further advice.
Hi,
I was trying to do a parametric analysis with AC Sweep. I was sweeping a particular resistance value from 400 ohms to 1100 ohms in steps. Actually the bode plot (DB and phase) at some particular point in the circuit should show a sharp turnaround at around 520 ohms. This was proved when I was changing the values manually and performing the AC sweep. But when I performed a parametric sweep this change was not seen , the curves were following same trend as in case of 400 ohms but with some minor offset in each case, but in actual case if you look at the curves when it is at 1100 ohms and when it is at 400 ohms there should be a huge differenece. I am not sure why this is happening. Has anyone faced similar problem ? please help me
One more point is if I want to sweep to different parameters at a time, is there any other way other than using IF statement,
Best regards
Madhuraj
How can this be done? I skimmed through manual, couldnt find it yet, also played with options in RF-Edit subsection, there are different nice features, but I dont see how can I lay down that type of interconnect wire, with soldermask on top (so that wire is exposed to air and not covered with anything).
Or maybe How can I make some trace or polygon on top of board get additional soldermask?
(I know I can put my own rectangle or any shape and define it as soldermask though. )
Sounds simple, but it just does not work. Maybe some switch has to be turned on for that or anything else? It is amazingly non-intuitive!
There is some polygon on TOP layer for the Etch class. I select it, menu pops up where I can assign color to it etc, again..means its selected, and nothing else is. I press Ctrl+D, or Select Delete from Edit menu, in the bottom it says something like:
Selected item not valid for current operation, ignored: Net "N05231"
No valid items selected for the current operation, exiting.
BUt how come not valid? I just want to delete it, I tried several modes, Etch edit mode, general edit modes and others, same thing!
...I'v used several PCB design software packages already, its the first time I come up with such a thing in Allegro.. any idea what am I missing? (maybe I turned something on/off and for some reason it just ignores my request to delete object? I have no idea..)
I've been updating a few library symbols originally done under 16.3. When doing a "refresh padstacks" in the symbol editor, I get the following log file entry:
INFO: Design is an old-style flash design. Any thermal relief
geometries will preserve name but set Geometry to Rectangle.
The library padstacks were done with flash symbols for thermals, but with new "fsm" symbols. The symbol is circa v16.3, so is not the "old style flash design" indicated. The results of the padstack refresh are indeed as indicated. In the design padstack, the thermals are shown with the flash symbol name, but the geometry has indeed been changed from "flash" to "rectangle".
Why?? The padstacks involved are not rectangular, nor are the flash symbols used. Also, on some footprint symbols, after the padstack refresh, the "update symbols" command does not list the thermal flash symbols as used. On some other symbols it does. Must be a new 16.6 "feature".
Any clues?
Hey guys, how do I attach a picture to a post without an external URL. I seem to recall there was a post on this some time ago but cant seem to find it on the board.
Thanks Scott
for example I have some RF Connect (or maybe even regular trace if you wish) which connects pads of two elements.
Now I want pad of third element to be added to same connection net, But i do not want run another trace from that third element's pad, I just want to move in third element so that its pad touches the trace interconnect between first and second elements, and have it electrically connected.
I am attaching picture for clarity.
And as you see, the DRC still thinks that third element is not connected, although it electrically is connected to that Net.
So how can I make it figure out that pad is connected and remove that ratsnest line?
I am trying to route multiple pins at the same time but having difficulty.
In pic R1 I routed the traces one at a time and this looks ok.
But in pics r2,r3 I tried to route all the pins in one go similar to pic r1 but no matter what I try I cant make allegro route the way I want it. I triied various settings of bubble and changing the control wire on the cline but it just seems to get lost in how to handle the pins at the bottom of the picture.
Was wondering if anyone can offer me some pointers.
See attached picture
Thanks Scott
hi,
I am editing dence board in which few parts added , When I pick each part to place its taking more time to complete & for next pick
I think its running database check in the background . Any idea Is there any setting I can do to avoid this ?
Unaware I was in the wrong forum, I've been posting this PCB layout question in the Digital Implementation forum
http://www.cadence.com/Community/forums/p/23378/1322026.aspx#1322026
I am trying to take a group of pre-selected vias and change the net that they are on. My inquiry is as follows:
Apparently you have to be in General Edit mode to select a via without automatically starting a Cline from it, so I am in General Edit Mode
I select the via, then go to the menus and select Edit > Change The only things in the Options panel that I can change are: Class, Subclass, Act via, Line Width, Text Block, and Text Just
There is no net option to select a net for the via to change to. I'm sure I'm missing something but I don't know what. I simply want to take a group of selected etch objects (for example several vias) and change the net that they are on to another net.
If I draw a track from a via with no net, it will assign itself to the net of the destination pin, but I'd like to be able to take a group of vias and either assign a net, or change the net that they're on in one step. Any clarification would be appreciated
Thanks in advance for any insight
Hi,
I am using orcad 9.2 version, i need your help for making layout for PCB with gerber file.
so far schematic is created in capture, the netlist is created showing lots of error with taht schematic. For testing i have made another small circuit showing no error while netlist but in layout plus showing no lib found but i have insatlled it or should i add more...
please help me here is my schematic pls change .DSN(no option for uploading file?)
http://www.fileswap.com/dl/7HWWL6XyD/
Thanks
A lot of boards I have done over the years have used MIL-STD-1553 communications. Normally these were boards where the coupling transformers were located close to the connector. The manufacturer of the coupling xfmrs and transceiver recommends not having any power or ground planes directly under the 1553 traces. For previous designs this was not an issue. I am now working on a design where I have to route the 1553 through several boards before it gets to the outside world connector.
In order to not have voids through the planes, I am planning on routing the 1553 traces down the outer edges of the boards. I was just curious if there are nay designers out there that have 1553 experience and what their thoughts on this may be.
I have contacted the Applications Engineer for the pars we are using but he only refers me to the data sheet which is somewhat vague.
Tom