I found the following model code for a CD4017B decade counter, but it doesn't work. I'm getting an error as seen in the attachment. The model code I found is:
*---------
* CD4017B CMOS COUNTER/DIVIDER
*
* CMOS INTEGRATED CIRCUITS DATABOOK, 1983, RCA SOLID STATE DIVISION
* NH 9/8/92 REMODELED USING LOGICEXP, PINDLY, CONSTRAINT DEVICES
*
.SUBCKT CD4017B CLK_I CLKINHIBIT_I RESET_I O0_O O1_O O2_O O3_O O4_O O5_O O6_O
+ O7_O O8_O O9_O CARRYOUT_O
+ OPTIONAL: VDD=$G_CD4000_VDD VSS=$G_CD4000_VSS
+ PARAMS: MNTYMXDLY=0 IO_LEVEL=0
*
U17BBUF BUF VDD VSS
+ CLK_I CLK
+ D0_GATE IO_4000B_ST IO_LEVEL={IO_LEVEL}
*
U17BLOG LOGICEXP(13,16) VDD VSS
+ CLK CLKINHIBIT_I RESET_I Q1 Q2 Q3 Q4 Q5 Q1BAR Q2BAR Q3BAR Q4BAR Q5BAR
+ CLKINHIBIT RESET CLOCK O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 CARRYOUT TOQ3 RST
+ D0_GATE IO_4000B IO_LEVEL={IO_LEVEL}
+
+ LOGIC:
+
* BUFFERS
+ CLKINHIBIT = { CLKINHIBIT_I }
+ RESET = { RESET_I }
+
* OUTPUT ASSIGNMENTS
+ CLOCK = { ~(~CLK | CLKINHIBIT) }
+ O0 = { Q5BAR & Q1BAR }
+ O1 = { Q1 & Q2BAR }
+ O2 = { Q2 & Q3BAR }
+ O3 = { Q3 & Q4BAR }
+ O4 = { Q4 & Q5BAR }
+ O5 = { Q5 & Q1 }
+ O6 = { Q1BAR & Q2 }
+ O7 = { Q2BAR & Q3 }
+ O8 = { Q3BAR & Q4 }
+ O9 = { Q4BAR & Q5 }
+ CARRYOUT = { Q5BAR }
+ TOQ3 = { ((Q1 & Q2) | (Q2 & Q3)) }
+ RST = { ~RESET }
*
UFF DFF(5) VDD VSS
+ $D_HI RST CLOCK Q5BAR Q1 TOQ3 Q3 Q4 Q1 Q2 Q3 Q4 Q5
+ Q1BAR Q2BAR Q3BAR Q4BAR Q5BAR
+ D0_EFF IO_4000B
*
U17BDLY PINDLY (11,0,4) VDD VSS
+ O0 O1 O2 O3 O4 O5 O6 O7 O8 O9 CARRYOUT
+ CLOCK RESET CLK CLKINHIBIT
+ O0_O O1_O O2_O O3_O O4_O O5_O O6_O O7_O O8_O O9_O CARRYOUT_O
+ IO_4000B MNTYMXDLY={MNTYMXDLY} IO_LEVEL={IO_LEVEL}
+
+ BOOLEAN:
+ CH_CLOCK = { CHANGED_LH(CLOCK,0) }
+ CH_RESET = { CHANGED_LH(RESET,0) }
+
+ PINDLY:
+ O0_O O1_O O2_O O3_O O4_O O5_O O6_O O7_O O8_O O9_O = {
+ CASE(
+ CH_RESET, DELAY(-1,265NS,530NS),
+ CH_CLOCK, DELAY(-1,325NS,650NS),
+ DELAY(-1,326NS,651NS) ;DEFAULT
+ )
+ }
+ CARRYOUT_O = {
+ CASE(
+ CH_RESET, DELAY(-1,265NS,530NS),
+ CH_CLOCK, DELAY(-1,300NS,600NS),
+ DELAY(-1,301NS,601NS)
+ )
+ }
+
+ FREQ:
+ NODE = CLK
+ MAXFREQ = 2.5MEG
+
+ WIDTH:
+ NODE = CLK
+ MIN_HI = 200NS
+ MIN_LO = 200NS
+
+ WIDTH:
+ NODE = RESET
+ MIN_HI = 260NS
+
+ SETUP_HOLD:
+ DATA(1) RESET
+ CLOCK LH = CLK
+ RELEASETIME_HL = 400NS
+
+ SETUP_HOLD:
+ DATA(1) CLKINHIBIT
+ CLOCK LH = CLK
+ SETUPTIME = 230NS
+ WHEN = { RESET!='1 }
*
.ENDS
I think it's missing some lines. Shouldn't there be a line starting with ".model"?
Thanks,
Mike
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